Reiners Publications and Presentations



Publications  and Presentations by  Reiner Hartenstein





 

 



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x      Legend:    

class of contribution

class of contribution

class of contribution

a

   abstract

 

b

  sollicited

 

k

   invited or keynotes (not refereed)

ai

   invited abstract

g

  refereed

kj

   invited contributions to journals and books

B

  books

 

n

  not refereed

 

ki

   invited keynote presentation (no paper ?)

bj

  sollicited contributions to journals and books

 

p

  popular

 

 kio

   invited conference opening keynote

gj

  refereed contributions to journals and books

r

  reports, internal reports, lecture notes etc.

kch

   invited chapter of a book

t

 presentation (no paper ?)

m

  memorandum

kf

   invited foreword of a book

ti

  invited presentation (no paper ?)

s

  submitted

w

   web-based newsletter

f

  featured invited presentation

ts

  to be submitted

wi

   invited for web-based newsletter

i

  interview

ns

  not submitted

N

  Notiz (notice)

ip

 inv. presentation at internal company meeting

it

   invited tutorial

ic

  invited course

     
 

The most cited Publications

Invited Courses given (full day or several days long)

Invited Presentations at International Company Meetings

Invited Papers and Invited Presentations

Invited about Microprogramming

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    Publications and Presentations:  

    (Translation of non-English titles into English: see Appendix)

  1. (gj) Ein elektronischer Zufallszahlengeber; Elektronik 10, 1961    <pdf>  - translation of title -
  2. (gj) (m. K.-H. Zörner) Der 'Servo-Zähler', ein Analog-Digital-Wandler; ATM Archiv für Technisches Messen, August 1963      - translation of title - <pdf>
  3. (r) (m. U. Jochimsen) Steuergerät zur Datenausgabe auf Lochstreifen durch ein- oder zweidimensional origaniserte Abfrage von Datenquellen; KFK 201, Kernforschungszentrum Karlsruhe, Januar 1964 - translate title
  4. (r) Modifiziertes Steuergerät zur Datenausgabe auf Lochstreifen mittels Tally-Locher 420 PR; KFK 245, Kernforschungszentrum Karlsruhe, August 1964      - translation of title -
  5. (r) (m. W. Jüngst) Ein flexibles elektronisches Bausteinsystem zur Datenerfassung bei kernphysikalischen Experimenten; KFK 275, Kernforschungsz. Karlsruhe, Dez 1964   - xlate title -  
  6. (r) (m. P. Gruber): Ein modifiziertes Steuergerät zur Datenausgabe auf Streifenlocher Tally 420 PR und elektronischer Schreibmaschine IBM 73/BCD; KFK 316, Kernforschungs-Zentr. Karlsr., März 1965   translate title

  7. (r) Das PATTERN-HANDLING-Software-Paket; interner Bericht, Forschungsgruppe automatische Zeichenerkennung, ITIV, Universität Karlsruhe 1967     translation of title
  8. (r) (m. H. Kazmierczak und F. Holdermann) Automatischer Klassifikator-Entwurf; Jahresbericht des ITIV, Universität Karlsruhe 1967  translation of title
  9. (b) (m. F. Holdermann und H. Kazmierczak) Verarbeitung, Erzeugung und Erkennung von Zeichenmustern; in: Nichtnumerische Informationsverarbeitung (Hrsg.: R. Gunzenhäuser), Springer-Verlag,  1968 - translate title -
  10. (r) Anwendung abstrakter Automaten in der Zeichenerkennung; Jahresb. 1968 ITIV, TH Karlsruhe,  xlate title
  11. (r) Entwurf abstrakter Automaten aus regulären Ausdrücken und deren Anwendung auf die Zeichenerkennung; Manuskript, vervielfältigt, Seminar am ITIV, Universität Karlsruhe, 1968     - translatetitle -
  12. (g) Über die Anwendung des endlichen Akzeptors auf das Zeichenerkennungsproblem; Dissertation, Universität Karlsruhe, 1969     - translation of title - <pdf1> <pdf2> <pdf3> <pdf4> <pdf5>
  13. (r) Synthese endlicher Automaten zur Musterklassifikation und Musterverarbeitung; Forschungsbericht Automatische Bildauswertungund Zeichenerkennung (Hrsg.: H. Kazmierczak), Universität Karlsruhe, 1969 - translate title -
  14. (g) Suchlistenstruktur zur Darstellung gerichteter Graphen und deren Anwendung bei Synthese und Minimierung spezieller endlicher Automaten; Elektronische Rechenanlagen, H. 4, 1970    xlate title - <PDF>
  15. (r) Über den Entwurf endlicher Automaten; Jahresbericht 1970 des ITIV, Univ. Karlsruhe, 1970 - xlate title

  16. (gj) Synthese endlicher Automaten bei Problemen der Erkennung, Klassifikation und Informationsreduktion; Elektronische Informationsverarbeitung und Kybernetik, EIK 7, Heft 5/6, 1971      - xlate title -
  17. (r) Grundlagen zum Versuch über Rückgekoppelte Schaltnetze; Kapitel zum Skriptum des Praktikums Technische Informatik, Informatik IV, Universität Karlsruhe, 1971     - translation of title -
  18. (r) Logik-Testautomaten, interner Bericht, Informatik IV, Univ. Karlsruhe, 1971     - translation of title
  19. (r) Grundlagen zum Versuch ´Mikroprogrammierung´; Kapitel zum Skript des Praktikums Technische Informatik, Inst. f. Informatik IV, Universität Karlsruhe 1971      - translation of title -
  20. (p) (m. Karl Steinbuch): Zukunftsaspekte der Informationstechnik; Techniken der Zukunft 1971  <pdf> <doc>
  21. (p) Entwerfen und Zeichnen mit Computer und Bildschirm; Techniken der Zukunft, Jan 71  <pdf>   <doc>   xlate
  22. (b,p) Wenn die Datenbank kommt; DIE WELT, 19. 6. 1971     <pdf>     xlate title      <Pressespiegel>
  23. (b,p) (m. Karl Steinbuch): Information - gestern, heute, morgen; Xerox Messe-Magazin, April 1971  xlate title
  24. (bj,p) Management-Information mit Computer und Bildschirm; Techniken der Zukunft Juni 71 <pdf> - xlate title -
  25. (b,p)( m. Karl Steinbuch): Die vierte industrielle Revolution; Rank Xerox Magazin 1 / 1971   <pdf>  - xlate title -

  26. (r) Konzept eines Hardware-Praktikums für Fortgeschrittene; Bericht (internes Arbeitspapier), Institut für Informatik IV, Universität Karlsruhe, 1972     - translation of title -
  27. (r) Grundlagen-Skriptum und Anleitungen zum Praktikum ´Technische Informatik´; Skriptum, Institut für Informatik IV, Universität Karlsruhe, 1972     - translation of title -
  28. (gj) Elemente der Prüftechnik für digitale Schaltungen; Elektronik 22/4, 1973  xlate title -
  29. (r) Rechnerarchitektur und Mikroprogrammierung; Skript z. eigenen Vorlesung, Univ. Karlsruhe, 1973  xlate title
  30. (b) (w. K.-D. Müller-Glaser) A Microprogrammable Display Processor Concept; in: (Ed.: L. Jones) Conference record 6th annual Workshop on Microprogramming, College Park, Maryland, ACM, NY 1973
  31. (n) (w. K.-D. Müller-Glaser) A Microprogrammable Display Processor for 3-dimensional Interactive Computergraphics; SIGMICRO Newsletter 4,2, 1973 
  32. (bj) dto. (see above), nachgedruckt (reprinted) in Computer Graphics, vol. 4, no. 2, 1973
  33. (n) A Halfbaked Idea on a set of Register Transfer Primitives; SIGMICRO Newsletter vol. 4, no. 3, 1973
  34. (n) Towards a Language for the Description of IC Chips; SIGMICRO Newsletter 4,4, 1973
  35. (g) Experimentiersystem für ein technisches Informatikpraktikum; in: (Hrsg.: P. Deussen) 2. Jahrestagg d. Ges. für Informatik in Karlsruhe, Okt 1972, Springer-V. Berlin/Heidelberg/New York 1973 - translation of title -
  36. (g) Hierarchy of Interpreters for Modelling Complex Digital Systems; in: (Hrsg.: W. Brauer) 3. Jahrestagung der Ges. für Informatik in Hamburg, Okt. 1973, Springer-Verlag Berlin/Heidelberg/New York, 1973 
  37. (g) Increasing Hardware Complexity - A Challenge to Computer Architecture Education; in: (Eds.: G. J. Lipovski, S. Szygenda) 1st Annual Symposium on Computer Architecture, Gainesville, FL, Dec. 1973;   
  38. (n) Hierarchy of Levels within Computer Architecture; CAN - Computer Architecture News, Mar 1 1974
  39. (b) On the interpretive Mechanism in microprogrammed Systems; EUROMICRO journal 2, Oct. 1974
  40. (g) Konzepte der Mikroprogrammierung; in: (Hrsg.: H.-O. Leilich) GI/NTG-Fachtagung Struktur und Betrieb von Rechnersystemen, Braunschweig, März 1974, Springer-Verlag  1974    - translation of title -
  41. (b) Microprogramming Concepts - a step towards Structured Hardware Design; in: Preprints of the 7th Annual Workshop on Microprogramming, Palo Alto, Cal., Sept. 1974        
  42. (bj) (m. Y. Chu et al.) Why do we need Hardware Description Languages; COMPUTER, Dec. 1974
  43. (r) Introduction to formal descriptions in Computer Organisation; internes Arbeitspapier, TU Karlsruhe, 1974
  44. (r) KARL - The Karlsruhe Architectural and Register Transfer Language - A draft specification; Skriptum, Fakultät für Informatik, Universität Karlsruhe, 1974           
  45. (B) ( Book Editor ) (Hrsg., m. R. Zaks) Microarchitecture of Computer Systems; North Holland Publ. Co./American Elsevier, Amsterdam/New York 1975       <the conference>  <dia show>    
  46.  (B)  ( Book Editor) Reiner Hartenstein, Olivier Lecarme, Rodnay Zaks: Computers in Education; University of Michigan; American Elsevier, 1975, 1020 pages    
  47. (b) Steps toward a Methodology of Integrated Hardware/Software Engineering; in: Proceedings of the 8th HICSS - Hawaii International Conference on System Sciences, University of Hawaii, Honolulu, 1975 <pdf>
  48. (g) (m. G. Koch) The Universal Bus Considered Harmful; in: R. Hartenstein, R. Zaks (editors): Microarchitecture of Computer Systems; American Elsevier,  1975  (Proc. 1st EUROMICRO Symp.)   <pdf>       
  49. (g) The use of ABL (Architectural Blockdiagram Language) for Design and Description of Hardware Structures; in: (Editor: R. Piloty) Proceedings of the International Workshop on Computer Hardware Description Languages, Darmstadt, Germany, 1974 (CHDL'74), ACM Lecture Notes, German Chapter ACM 1974 
  50. (g) The use of KARL (Karlsruhe ARchitectural Language) for the Description of Integrated Circuits; in: (Editor: R. Piloty) Proceedings of the International Workshop on Computer Hardware Description Languages, Darmstadt, Germany, 1974 (CHDL'74), ACM Lecture Notes, German Chapter ACM 1974 
  51. (g) Hardware Description Languages to Cope with the Complexity of Large Digital Systems: (Ed.: A. Madey) IFIP INFOPOL 1976 Intl. Conf. on Data Processing, Warsaw, Poland, American Elsevier, 1977  <award> 
  52. (B) ( Book Writer) Fundamentals of  Structured Hardware Design - A Design Language Approach at Register Level; North Holland, Amsterdam/New York 1977               
  53. (B) System Development and Development Systems; EUROMICRO, Amsterdam, 1977   
  54. (g) (w. W. Keller, Th. Siebold): A Compiler for the Computer Hardware Description Language KARL: in; (ed.) W. Giloi, H. Schindler: Kurzvorträge z. 8. Jahrestagung d. Ges. f. Informatik, Berlin 1978      
  55. (g) (m. K. Rosebrock, K. Hubschneider, R. Wiedemann): Ein SC/MP Multi-Mikrorechner-System zur Straßenverkehrs-Datenerfassung; Tagungsband zur PDV-Fachtagung über Mikrorechner-Anwendung in der Prozeßdatenverarbeitung, Kernforschungszentrum Karlsruhe 1978     - translation of title -
  56. (b) (m. E. von Puttkamer) Ansätze für integrierten Hardware/ Software-Entwurf; in: (Hrsg.: G. Hommel) Verfahren und Hilfsmittel für Spezifikation und Entwurf von Prozeßautomatisierungssystemen, PDV-Bericht, KFK-PDV 154, Juni 1978, Kernforschungszentrum Karlsruhe     - xlate title -
  57. (internatl report) Structured Hardware Design - a KARL-based multiplier floorplan design calculus; December 1978, Computer Structures Chair, TU Kaiserslautern, Germany   <pdf>  <ppt> 
  58. (k) (keynote address): LSI Design - from evolution to revolution ?; in: (Hrsg.: F. Vajda) Preprints of uP 1979 - Int'l Conf. on Microcomputers and Applications, Budapest, Hungary 1979   <keynotes>
  59. (g) Verallgemeinerung der Prinzipien mikroprogrammierbarer Rechnerstrukturen; in: (Hrsg.: K. Berg) Fachgespräche über Mikroprogrammierung, Gesellschaft für Informatik, Berlin 1979     - translation of title -
  60. (k) (handout and presentation of an invited VLSI Design Course) Computer Design Languages als Input Sources for LSI CAD, Siemens AG, Central Laboratories, Munich, Germany, Juli 1979     
  61. (g) (m. E. von Puttkamer): Loosely Coupled Micros as Distributed Function Architecture: a Design Kit and Development Tool; in: (Eds.: J. Tiberghien, G. Carlstedt), Preprints of the 5th Intl. EUROMICRO-Symp. on Microprogramming and Microprocessing, Göteborg, Sweden, 1979
  62. (g) (w E. von Puttkamer): KARL Compiler with graphic block diagram Input for LSI Chip Design; Int'l Conf. on Computer Hardware Description Languages and their Applications (CHDL'79), Palo Alto, CA, Oct. 1979         <wikibin>
  63. (r) (w. P. Liell, E. Schaaf, B. Weber): The grammar of KARL-2; Un. Kaiserslautern 1979    
  64. (b) The use of ABL (A Block Diagram Language); in: (Ed.: Y. Chu) Introducing Hardware Description Languages, Prentice-Hall, Englewood Cliffs, N.J. (das Buch ist nicht erschienen)      
  65. (g) Research and Development in Microprogramming, Microprocessors and related fields in the F.R. Germany, Euromicro Newsletter 01/1979; 5(3):121-124.   
  66. (r) Memo on VLSI research and developement funding; Universität Kaiserslautern, 1979
  67.      Using the wrong browser? This paragraph should have the number 67
  68. (r) (w. J. Dieckmann): Local Micro Network to support Software Modularity; report, Kaiserslautern, 1980
  69. (n) A Wiring Algebra for Specification of VLSI Design Problems; ACM SIGDA Newsletter, Aug. 1980
  70. (b) (m. G. Mußtopf) The consequences of microelectronics onto education in the computer science field; IFIP-WG 3.1, Working Conf. on Microcomputers and secondary education, Paris, Apr 1980      
  71. (r) (m. E. von Puttkamer): Ist die Informatik eine Ingenieur-Wissenschaft?; unveröffentliches Manuskript (vom GI-Informatik-Spektrum zurückgezogen nach ca.2-jähriger Blockade seitens F. L. Bauer), Kaiserslautern 1980     - xlate title
  72. (r) Curriculums-Überlegungen zur Rolle der Hardware in der Informatik; Bericht, 1980 -xlait title  
  73. (g) (m. J. Diekmann): The ESRA Network Kit for Hardware-aided Support of Software Reliability; ICCC, Intl.Conf. on Computers and Circuits, Port Chester, New York, Okt. 1980
  74. (r) Innovations-Schübe der VLSI-Technologie; Memo, Univ. Kaiserslautern 1980     - translation of title -
  75. (bj) VLSI-Bausteine in geringen Stückzahlen und für Spezialanwendungen; Elektronische Rechenanlagen 3, Bd. 22 (1980)  - translation of title -         
  76. (bj) A KARL subset used as a hardware design algebra; ACM SIGDA Newsl. 10/2, 1980; <pdf> <abstr>  
  77. (g) (m. J. Diekmann, W. Konrad): A Local Micro Network to Support Software Modularity; The 6th EUROMICRO-Symposium, London, UK, September 1980
  78. (g) (w. J. Diekmann, W. Konrad) Softwarezuverlässigkeit in Rechnernetz-Baukästen verteilter Programmierung, ACM German Chapter Workshop on Hardware for Software, Konstanz, Okt. 1980  - translation of title -
  79. (bj) Basics of Structured Design Methodologies: Data Path and Finite State Machines in: (eds.: P. Jespers, C. Sequin) Design Methodologies for Very Large Scale Integrated Circuits, Stijthoff & Noordhoff, 1980  
  80. (bj) Shared Culture: CIF Library, Starting Frames, Scalable Design Rules; in: (eds.: P. Jespers, C. Sequin) Design Methodologies for Very Large Scale Integrated Circuits, Stijthoff & Noordhoff, 1980
  81. (r) (w. H. Bellm, J. Diekmann, M. Flötotto, W.Konrad, A. Sauer, W. Schmitter): Die Realisierung des ESRA-Rechnernetz-Baukasten-Systems: ein Ansatz zu einer Methodologie für zuverlässige Software, Bericht, 1980     - translation of title -
  82. (g) (m. P. Liell, E. Schaaf, B. Weber): Eine PASCAL-Implementierung der Rechnerentwurfssprache KARL, Kurzvorträge, 10. GI-Jahrestagung, Saarbrücken, Sept. 1980  - translation of title -    
  83. (p) "AUF EIN WORT"; DIE WELT, 16. Okt. 1980     - translation of title -   <der text>      <Pressespiegel>
  84. (p) "AUF EIN WORT"; DIE WELT, 11. Dez. 1980     - translation of title -   <der text>      <Pressespiegel>
  85. (b) Tutorial on VLSI Design>(hand-out to participants), 7th EUROMICRO Symposium, Paris, 1981 
  86. (p) "AUF EIN WORT"; DIE WELT, 7. Jan. 1981     - translation of title -   <der text>      <Pressespiegel>
  87. (r) (w. P. Liell, E. Schaaf, B. Weber) CHARLES - A Register Transfer Language for Hardware Design and Specification, report, University of California at Berkeley / TU Kaiserslautern, 1981 
  88. (r) Arne Halaas, visiting prof., on leave fr. Norwegian Inst. of Technology, Trondheim, Norway: "VLSI-implemented Algorithms for Fundamental Searching and Sorting Problems"; report, TU Kaiserslautern, June 1981    
  89. (r) (w. P. Liell, E. Schaaf) The Grammar of KARL 2; Bericht, TU Kaiserslautern 1981      
  90. (r) (w. P. Liell, E. Schaaf, B. Weber): KARL user manual and introduction; report Kaisersl., 1981 <wikibin> 
  91. (B) (Book Editor. w. Melvin Breuer) Computer Hardware Description Languages and their Applications; North Holland Publ., Amsterd./New York, 1981     <this conference>  <Reiner's books>   
  92. (b) Run time diagnostics of faults and communication indigestion in a loosely coupled local microcomputer network, (Ed.: P. Dal Cin, E. Dilger), Workshop on Self-Diagnosis and Fault Tolerance, Tübingen 1981
  93. (i,b) Zwischenbericht - Einführung der Neuen Mikroelektronik (Mead-&-Conway-Methode) in der Bundesrepublik; Universität Kaiserslautern 1982     - translation of title -           
  94. (b) KARL-II  --  eine Sprache zur Spezifikation beim Entwurf kundenspezifischer Digitalbausteine; Angewandte Informatik; 12/1982 Verlag Vieweg & Sohn,    
  95. (b) Programm-Konstruktion unter loser Kopplung  TU Kaiserslautern, CSG, Fachb. Informatik 1982   <pdf>   
  96. (k) (Handout and presentation of an invited 3 day VLSI Design Course) Introduction to VLSI System Design;   Siemens- AG, Zentrallabor, Munich-Neuperlach, Germany,  (June 1982)       
  97. (k) (handout and presentation of an invited 5 day VLSI Design Course) Introduction to VLSI System Design;  Siemens-AG, R&D Dept. at "Geraetewerk" Karlsruhe, Germany (June 1982)     
  98. (k) (major part of an invited 3 week VLSI Design Course); Hardware Description Languages and their Applications; Schuola Guglielmo Reiss-Romoli, L'Aquila, Italy, 1982   
  99. (p) "AUF EIN WORT"; DIE WELT, 13. Mai 1982     - translation of title <der text>      <Pressespiegel>
  100. (k) (handout and presentation of an invited 3 day VLSI Design Course) Introduction to VLSI System Design,  GMD (G. f. Math. u. Datenverarb.), Schloss Birlinghoven, St. Augustin, Germany, Sep 27-29 1982 
  101. (k) (handout and presentation of an invited 3 day VLSI Design Course) Introduction to VLSI System Design,  GMD (G. f. Math. u. Datenverarb.), Schloss Birlinghoven, St. Augustin, Germany, Oct 18-20 1982 
  102. (k) (handout and presentation of an invited 3 day VLSI Design Course) Introduction to VLSI System Design; INPG  Entreprise SA,  Grenoble, France, Oct. 1982  
  103. (bj) (Leitartikel) "VLSI: Wir stehen erst am Anfang"; ELEKTRONIK, 28. Okt. 1982     - translation of title -
  104. (k) (handout and presentation of an invited 3 day VLSI Design Course) Introduction to VLSI System Design; Elektrotechniek department, TH Twente, Enschede, Netherlands, Nov 17-19, 1982       
  105.      Using the wrong browser? This paragraph should have the number 105
  106. (gj) Das E.I.S.-Verbundprojekt: Aufbruch in die Neue Mikroelektronik; Computer-Magazin, 1984 (english: The E.I.S.-Compound-Project: Start in the New Microelectronics)        
  107. (k) (major part of an invited 5 day VLSI Design Course) Hardware Description Languages and their Applications; Centro Studi et Laboratori Telecommunicazioni, Torino, Italy, Feb 27 - March 2 1983     
  108. (k) ( keynote address Impact and Education of the 'New Microelectronics'.; 25 Year Anniversary Symposium of the Institute for Imformation Processing (founded by Karl Steinbuch), Karlsruhe University of Technology, Karlsruhe, Germany, March 11, 1983 - <pdf> in German; 
  109. (r) (w. P. Liell): Specification of the KARL-III language; TU Kaiserslautern, June 1983  
  110. (r) (w. P. Liell); KARL-II Language Reference Manual, report, TU Kaiserslautern 1983  
  111. (r) The Evolution of a Planar Algorithm: a History of Design Decisions CVTrep, TU Kaiserslautern 1983
  112. (r) (w. A. Mavridis): RTCode Instant; CVT report, Kaiserslautern, 1983    
  113. (r) Specification of the KARL-III language; CVT report; Kaiserslautern, 1983  
  114. (r) KARL-II application notes; CVT- report; Kaiserslautern, 1983     <wikibin>  
  115. (r) (w. G. Girardi): ABL-Specification -Draft-; CVT-rep. Torino, Italy / Kaiserslautern, 1983  
  116. (b) Innovationen der Neuen Mikroelektronik durch neue Lehrmethoden in Elektrotechnik und Informatik, (Hrsg. U. Baitinger, H. Lipp:) 25-Jahrfeier des ITIV, Univ. Karlsruhe, 1983  <freenet>-  <pdf>  - xlate title -
  117. (b)  (invited 2 day course) VLSI-System-Entwurf für Manager; (incl. Kursunterlagen) für die CCG (Carl-Cranz-Ges., c/o DLR Oberpfaffenhofen), 2-tägiger Kurs in Oberpfaffenhofen (Bayern) 1983    - xlate title -
  118. (b)  (invited 5 day course) VLSI-System-Entwurf; (incl. Kursunterlagen) für die CCG (Carl-Cranz-Ges.), c/o DLR Oberpfaffenhofen),1983        xlate title
  119. R. Hartenstein: Drei große G bergen das Geheimnis der Zukunft (Über die Entstehung des Silicon Valley); WELT am SONNTAG, 3. 10. 1983   <der Text>      <Pressespiegel>
  120. (p) "AUF EIN WORT"; DIE WELT, 24. Okt. 1983   -  <der text>  - translation of title      <Pressespiegel>
  121. (p) Deutschland in der Rolle eines Entwicklungslandes; WELT am SONNTAG 1983   <text>  - translation of the title -    <Reiner Hartenstein's Pressespiegel>
  122. (bj) Silicon Compiler - Das aktuelle Schlagwort; GI Informatik Spektrum. 01/1983; 
  123. (m. P. Braun, E. Ewald, J. Hassdenteufel, R. Hauck, A. Hirschbiel, M. Weber): Das DRC-KL-Programmsystem; CSG, Fachbereich Informatik; Univ. Kaiserslautern, 1983 (english: "DRC-KL-Program-System") 
  124. (r) (w. P. Braun, J. Hassdenteufel: Pixel-oriented Layout Analysis: Semi-Automatic Analyzer Generation for Design Rule Check and Circuit Extraction; report,  Univ. Kaiserslautern, 1983
  125. (g) (w. G. Girardi, U. Welters): ABLED - ein CAD-Hilfsmittel für den Entwurf digitaler Systeme; DECUS München Symposium, Stuttgart 1983 (Version v. 102)               - translation of title -   
  126. (r) (w. K. Lemmert): KARL-III reference manual; CVT report, Kaiserslautern 1984        
  127. (p) Hochtechnologie hat viele freie Arbeitsplätze; WELT AM SONNTAG, 25. März 1984    <text>    <Pressespiegel>
  128. (k) (handout and presentation of an invited 2 day VLSI Design Course) Hardware Description Languages and their Applications; Centro Studi et Laboratori Telecommunicazioni, Torino, Italy, April 1984   
  129. (r) (m. B. Borrmann): Die Übertragung von superKarl-Konstrukten in die Hardware-Beschreibungssprache KARL; report, Kaiserslautern, Mai 1984         - translation of title -  
  130. (b)  (invited 2 day course) VLSI-System-Entwurf für Manager; (incl. Kursunterlagen) für die CCG (Carl-Cranz-Ges., c/o DLR Oberpfaffenhofen), 2-tägiger Kurs in Oberpfaffenhofen (Bayern) 1984       - xlate title
  131. (r) (w. G. Girardi, A. Mavridis, W. Nebel): KARL-II description and simulation examples; Kaisersl., March 1984   
  132. (ns) (w. B. Borrmann): Parametric KARL description: hyper-KARL specification (draft); Kaisersl., May 1984   -  
  133. (r) (m. w. Nebel): Ein Layout generierendes System mit ABL-Eingabe; Fb. Informatik, Kaiserslautern 1984  -  
  134. (r) (w. B. Borrmann): superKARL-III Specification; CVT rep., Kaiserslautern, 1984        <freenet> <fn-mirrort>
  135. (r): KARL III Instant; CVT report, CSG, TU Kaiserslautern, August 1984        <freenet> <fn-mirrort> <pdf>
  136. (r)(w. R. Hauck, A. Hirschbiel, W. Nebel, M. Weber): PISA, a CAD package and special hardware for pixel-oriented layout analysis; Report, Univ. Kaiserslautern, 1984   --   citation at Buffalo  
  137. (r) (w. R.Hauck, A.Hirschbiel, W.Nebel, M.Weber): PISA - A CAD package and special hardware for pixel-oriented layout analysis, ICCAD, Santa Clara, 1984, IEEE, New York 1984  --   citation <pdf>
  138. (r) Pressespiegel eines Halben Jahrzehnts; Fachbereich Informaik, TU Kaiserslautern, 1984   --   <htm>  
  139. (b)  (invited 5 day course) VLSI-System-Entwurf; (incl. Kursunterlagen) für die CCG (Carl-Cranz-Ges., c/o DLR Oberpfaffenhofen), 1984        xlate title                   
  140. (r) (w. J. Bloedel, R.Hauck, M. Ryba, H.Salzmann, M.Weber): PISA user manual; report, TU Kaiserslautern 1985 
  141. (g) (w. K. Lemmert): Entwurfs-Konzeption und Spezifikation von Digital-Hardware, gelenkt durch eine Entwurfs-Sprache, Proc. 11. Internationaler Mikroelektronik-Kongress, München 1984 <pdf>   xlate title -
  142. (r) (w. K. Lemmert): A Design language for the 'Long Thin Man'; CVT rep. TU Kaiserslautern Feb 1985 <pdf>   
  143. (r) (w. A. Wodtko:) Automatic Generation of Functional Test Patterns from RT Language Source; Interner Bericht; Fachbereich Informatik, Universität Kaiserslautern, März 1985
  144. (r) Kaiserslauterns CAD Activities within the CVT Project; interner Bericht 125/85, Fachbereich Informatik, Universität Kaiserslautern, 1985  <pdf>   <freenet>           
  145. (r) (w. G. Girardi, U. Welters): ABLED - a RT Level Schematic Editor and Simulator Unser Interface; CVT report; Turin / Kaiserslautern 1985    <freenet>                  <pdf>  
  146. (g) (w. A Wodtko): Automatic generation of Functional Test Patterns from RT-language source; Int'l EUROMICRO Symposium; Brussels, Belgium, 1985, North Holland Publishing Co, Amsterdam 1985
  147. (g) (w. G. Girardi, U. Welters): ABLED: a RT level Schematic Editor and Simulator user Interface;  EUROMICRO Symp., Brussels, 1985, North Holland Publishing Co, Amsterdam 1985    <freenet>      
  148. (r) KARL-III Primer (draft), CVT report, Kaiserslautern, April 1985  
  149. (r) Instant KARL-3: "KARL and SCIL in a nut shell" CVT report, CSG, TU Kaiserslautern, 1985   <pdf>  
  150. (r) (w. R. Hauck): KARL language update, CVT report, TU Kaiserslautern,1985     
  151. (r) (m. K. Lemmert): The Hardware Description Language KARL-III: its Integration into a CAD Tool Box; report, Fachbereich Informatik, Universität Kaiserslautern 1985      
  152. (r) (m. G. Alfs, A. Wodtko): C-Testable Cells for ATPG from RT Descriptions; report; Kaiserslautern 1985     
  153. (r) (w. A. Wodtko): Functional Test Generation within the KARL-III System; report, Kaiserslautern 1985      
  154. (r) (m. W. Nebel): EDIF-based Notation for Layout/Circuit Relations: toward Technnology-Independance of CAD Tools; report; Fachrereich Informatik, TU Kaiserslautern 1985         
  155. (b)  (invited presentation) European Research Projects on CAD for VLSI; JEIDA, Japanese Electrotechnical Industry Association, Keidanren Kaikan, Tokyo, Japan, Sept. 1985
  156. (b)  (invited presentation)   European Research Projects on CAD for VLSI; Fujitsu Corporation, Research Laboratories, Kawasaki, Japan, September 1985        
  157. (b) Toward Engineering System Sciences; SEFI Annual Symposium, Madrid, September 1985   
  158. (b) Neuere Entwicklungen auf dem Gebiet der CAD Entwurfsverfahren für VLISI; Elektrotechnisches Kolloquium, Universität Duisburg, September 1985   
  159. (g) (mit K. Bastian, W. Nebel): VLSI-Algorithmen: innovative Schaltungstechnik statt Software - SHUFFLE SORT: VLSI-Beispiel eines Sortierers; Ges. f. Meß- und Regelungstechnik: Tagung Mikroelektronik in der Automatisierungstechnik, Baden-Baden 1985; VDI-Bericht 550, Düsseldorf 1985 - xlate title   <pdf>   
  160. (b)   (invited 5 day course) VLSI-System-Entwurf; (incl. Kursunterlagen) für die CCG (Carl-Cranz-Ges., c/o DLR Oberpfaffenhofen), 5-tägiger Kurs in Oberpfaffenhofen (Bayern)  1985         - translation of title
  161. (b)   (invited 2 day course) VLSI-System-Entwurf für Manager; (incl. Kursunterlagen) für die CCG (Carl-Cranz-Ges., c/o DLR Oberpfaffenhofen), 2-tägiger Kurs in Oberpfaffenhofen (Bayern) 1985        - translation of title -
  162.      Using the wrong browser? This paragraph should have the number 162
  163.  (k)  (handout and presentation of an invited 5 day VLSI Design Course): Introduction to VLSI System Design;  University of Patras, Greece, February 1986                           Click here !
  164. (k) (handout and presentation of an invited 3 day VLSI Design Course): Introduction to VLSI System Design; Research Center Demokritos, Athens, Greece, February 1986         
  165. (r) (m. K. Lemmert, A. Wodtko) KARL-III Language Reference, second edition (completely rewritten), Fachbereich Informatik, Universität Kaiserslautern, March 1986
  166. (r) (m. R. Hauck) Design of Symbolic Layout using RT Level CAD Tools; Kaiserslautern 1986    
  167. (r) (m. W. Nebel) REX: a new CAD Tool shifts Functional Circuit Verification towards RT level; report, Fachbereich Informatik, Universität Kaiserslautern, 1986     
  168. (r) CVT Software Catalogue; Annex A1, CVT final report, May 1986     <list>
  169. (g) (m. R. Hauck) Entwurf von Symbolischem Layout mit Werkzeugen der Register-Transfer-Ebene; Zweiter E.I.S.-Workshop, Bonn, Germany 1986           - translation of title -  
  170. (r) (m. R. Hauck) Die Ableitung von Verhaltens-Beschreibungen aus Matrix-orientiertem Layout; report, Fachbereich Informatik, Universität Kaiserslautern, 1986     - translation of title -
  171. (g) dto.: Second E.I.S.-Workshop, Bonn, Germany 1986     - translation of title -
  172. (k) (keynote address Introduction to VLSI-System Design, E.I.S. Summer School "CAD/VLSI", Arnoldsheim/Taunus, Germany, Juni 1986        
  173. (r) (m. R. Hauck) A simple Silicon Synthesizer for MOL circuits; report, Kaiserslautern, 1986
  174. (r) (m. R. Hauck) Recursive Cell Declarations in a RT Language; report, TU Kaiserslautern, 1986
  175. (ti) Parametric KARL description: hyper-KARL specification (draft); Kaiserslautern, May 1984    -  
  176. (ti) The Role of Hardware Description Languages in Integrated CAD Systems for VLSI Design; CVT Open workshop, CNET, Grenoble, France, 1986                
  177. (ti) The Classification of Hardware Description Languages; in: (R. Hartenstein, Editor): Advances in CAD for VLSI: Vol. 7, Hardware Descriotion Languages; North Holland / American Elasevier, Amsterdam/New York 1986  <pdf>
  178. (ti) Map-oriented Processing: Akzelerations-Konzept und VLSI-Entwicklungsumgebung für eine Klasse von Datenverarbeitungssystemen; Seminar des IMS, Duisburg, Juli 1986   
  179. (k)   (invited presentation ) VLSI Design and Simulation at Register Transfer Level; in (eds.: W. Fichtner, M. Morf:) Proc. IFIP Summer School on VLSI Design, Beatenberg, Switzerland; Kluver Publ. Co, New York 1986
  180. (k)   (invited presentation ) Higher Level Simulation and CHDLs; in (eds.: W. Fichtner, M. Morf:) Proc. IFIP Summer School on VLSI Design, Beatenberg, Switzerland; Kluver Publishing Co, New York 1986      
  181. (B)   book w. Klaus Woelcken (editors): Proceedings first European Conference on Customer/Vendor Interfaces in Microelectronics (EURO CVIM); TU Kaiserslautern 1986;  GMD, St. Augustin, Germeny, 1987    
  182. (r) (m. R. Hauck, A. Hirschbiel:) A KARL simulator Physical Model Extension; Kaiserslautern, 1986        
  183. (B) ( Book Writer) Hardware Description Languages; Volume no. 7 of the series on Advances in CAD for VLSI, North Holland, Amsterdam/New York, 1986          
  184. (b) KARL (textuell) und ABL (graphisch): Eine Anwender/Designer-Schnittstelle in der Mikroelektronik; in (Hrsg.: J. Encarnaçao) CAD-Schnittstellen und Datenformate im Elektronik-Bereich, ZGDV-Reihe, Springer-Verlag, Berlin/Heidelberg/New York 1986             - translation of title   
  185. (b) (invited presentation, w. U. Welters) RT level CAD tools and simulation; Ed.: G. Fichtner, M. Morf: VLSI-Tools and Applications, IFIP summer school, Beatenberg, Switzerland, Kluwer Publ. Co, 1986       
  186. (g) (m. K. Lemmert) The KARL Compiler and Simulator, the Core of a CAD Tool Box; / Proc. EUROMICRO Symposium, Venice, Italy, 1986, North Holland Publ. Co,  1986           
  187. (bj, p) Ausbruch der E.I.S.-Zeit; Titelgeschichte: Computer Magazin 3 (März) 1986  - xlate title -
  188. (b,p) Der Mikroelektronik-Markt und Neue Infrastrukturen; VDI-Nachr. 29. Aug 1986 - xlate title -
  189. (b)   (invited 5 day course) VLSI-System-Entwurf; (incl. Kursunterlagen) für die CCG (Carl-Cranz-Ges., c/o DLR Oberpfaffenhofen), 5-tägiger Kurs in Oberpfaffenhofen (Bayern)  1986         - translation of title -
  190. (b)   (invited 2 day course) VLSI-System-Entwurf für Manager; incl. Kursunterlagen für die CCG (Carl-Cranz-Ges., c/o DLR Oberpfaffenhofen), 2-tägiger Kurs in Oberpfaffenhofen (Bayern) 1986        - translation of title -
  191. (k) CAD-Hilfsmittel hoeherer methodologischer Ebenen: CD - Conceptual Design; Professorenkonferenz "Nachrichtenechnik im Zeichen der Mikroelektronik" im Fernmeldetechnischen Zentralamt, Darmstadt, 1987
  192. (r) Technische Informatik II, Skriptum zur Vorlesung, Fachbereich für Informatik, Universität Kaiserslautern, 1987     - translation of title -  Vorstufe zum späteren Buch 
  193. (w. G. Girardi, U. Welters): ABL - an interactive graphic user interface in microelectronics; in: J. Encarnaçao: CAD-Schnittstellen und Datentransferformate im Elektronik-Bereich; Springer-V. 1987  <freenet>
  194. (b) Simulation von VLSI-Schaltungen; CAD-CAM REPORT, Februar 1987
  195. (gj) (w. U. Welters): Higher Level Simulation and CHDLs, in: Fichtner/ Morf: VLSI CAD Tools and Applications, Kluwer Academic Publishers, 1987 - <pdf>                        
  196. (k)  (handout and presentation of an invited 5 day VLSI Design Course) M Glesner, R. Hartenstein (chair), K. Mueller-Glaser, Th. Vierhaus: Introduction to VLSI System Design; ordered by UNESCO and Portugese Computer Society, Lisbon, Portugal, Aug.1987               
  197. (g) (w. J. Blödel, W. Nebel, M. Ryba): A Technology Description Method for Generalized Layout/Circuit Relations; EUROMICRO '87, Short Notes Programme, ed. John Mølgaard, Portsmouth, UK Sep 14-17, 1987
  198. (g) (w. J. Blödel, M. Ryba): PAGE · An ELL(1) Based EDIF Parser Generator; Proceedings of the European EDIF Forum, Brussels, Belgium, Sept. 30, 1987         
  199. (g) (w. J. Blödel, W. Nebel, M. Ryba): Automatische Extraktion von Register-Transfer-Beschreibungen aus geometrischem Layout integrierter Schaltungen; 3. E.I.S. Workshop, Bonn, 13./14. Okt 1987  - translation of title -
  200. (g) (w. J. Blödel, W. Nebel, M. Ryba): EDIF Notation for Layout / Circuit Relations; in: Proc. IFIP WG 10.2 Workshop on Tool Integration and Design Environments, ed. F. Rammig, Paderborn, 26-27 Nov. 1987         
  201. (g) (w. U. Welters): MLED: A Multiple Abstraction Level Graphical Editor; Proceedings of the EUROMICRO '87 Symposium; Portsmouth; UK, Sept. 1987 <SciVerse1>    <SciVerse2>   <ACM-DL>   <lw20> 
  202. (g) (w. U. Welters): Mehrebenen-Graphik-Editor als DBMS für Simulations- Umgebungen; ASIM '87 - 4. Symposium Simulationstechnik; ETH Zürich, Switzerland, Sept. 1987
  203. (ti) Introduction to using KARL in VLSI design; CTI (Centro Technologica para Informatica) Campinas, SP, Brasil, Oct 1987   
  204. (ti) VLSI CAE tool integration to support Design for Testability at Early Phases of Design; CTI (Centro Technologica para Informatica) Campinas, SP, Brasil, Oct 1987   
  205. (ti) The E.I.S. Project - a Multi University Effort of Research and Instruction in VLSI Design at the Federal Republic of Germany; CTI (Centro Technologica para Informatica) Campinas, SP, Brasil, Oct 1987   
  206. (ti) Introduction to using KARL in VLSI design; UFRGS university at Porto Allegre, RGS Brasil, Oct 1987   
  207. (ti) The E.I.S. Project - a Multi University Effort of Research and Instruction in VLSI Design at the Federal Republic of Germany; UFRGS university at Porto Allegre, RGS Brasil, Oct 1987   
  208. (ti) MoM - A Semi-von-Neumann Accelerator Architecture; (Centro Technologica para Informatica) Campinas, Brasil 1987
  209. (ti) The E.I.S. Project - a Multi University Effort of Research and Instruction in VLSi Design at the F.R.G.; CTA (Centro Technologica para Aeronautica), Sao Jose dos Campos, Brasil, Oct. 1987   
  210. (ti) Research on VLSI Design Methodologies at Kaiserslautern University; CTA (Centro Technologica para Aeronautica), Sao Jose dos Campos, Brasil, Oct 1987   
  211. (ti) Structured VLSI Design using structural modeling by RT Language Expressions; EE department University UNICAMP, Campinas, SP Brasil 1987   
  212. (ti) Synergistic VLSI CAE Tool Integration at Early Phases of the Design Process; EE department University UNICAMP, Campinas, SP Brasil, Oct 1987         
  213. (ti) Integration of Comceptual VLSI Design and Test Development; CPqD TELEBRAS, Campinas, SP Brasil 1987
  214. (ti) The German Multi-University E.I.S. Project; CPqD TELEBRAS, Campinas, SP Brasil, 1987
  215. (ti) KARL-related VLSI CAE Tools; PUC (catholic university), Rio de Janeiro, Brasil, November 1987   
  216. (ti) Research on VLSI Design Methodologies at Kaiserslautern University; UFRJ, Rio de Janeiro, Nov 1987
  217. (ti) RT Level CAE Tools for VLSI Design; IBM Centro Scientifico, Rio de Janeiro, Brasil, November 1987  
  218. (g) (w. R. Hauck): Functional Extraction from Personality Matrixes of MOL (Matrix-Oriented Logic) Circuits; IFIP CHDL'87, Amsterdam, Holland, 1987  <PDF> 
  219. <(g) (w. A.Hirschbiel, M. Weber): MOM - Map Oriented Machine, Proc. Int'l Workshop on Hardware Accelerators, Oxford, UK Oct. 1987;  in T. Ambler, P. Agraval, W. Moore (eds.): Hardware Accelerators for Electrical CAD, Adam Hilger 1988   <PDF>  <PDF>   <ppt>  <photos>  citation at Buffalo        
  220. (g) (w. A.Hirschbiel, M.Weber): MOM - Map Oriented Machine, International Conference on Parallel Processing and Applications,L'Aquila, Italy, Sept. 1987.      <PDF>    <photos>      
  221. (g) (w. A.Hirschbiel, M.Weber): A Flexible Architecture for Image Processing; Proceedings of the EUROMICRO Symposium, Portsmouth, UK, 1987.     <PDF>  <pdf-2>  <pdf-3>              
  222. (g) (w. W. Nebel): Shifting Functional Design Verification Towards RT Level by Automatic Register Transfer Net Extraction; IFIP CHDL'87, Amsterdam, 1987
  223. (g) (w. W. Nebel): Functional Design Verification by Register Transfer Net Extraction from Integrated Circuit Layout Data; IEEE COMPEURO, Hamburg, 1987
  224. (r) (w. A.Bonomo, G.Girardi, L.Lavagno, R. Hauck): Syntax Diagrams of the CVS_BK Language (CVS Behavioural Karl); ESPRIT / CVS report, CSELT, Torino, Italy / Informatik TU Kaiserslautern, Feb 1987 
  225. (r) (w. A.Bonomo, G.Girardi, L.Lavagno, R.Hauck): Semantic Specification of CVS_BK Language (CVS Behavioural Karl); ESPRIT / CVS report, CSELT, Torino, Italy / Informatik, Un. Kaiserslautern, Febr. 1987 
  226. (r) Entwurf eines Universalprozessors mit Hocharchitektur, Univ. Kaiserslautern, 1986  - translation of title -
  227. (r) Proposal of a High Level Hardware Description Language; ESPRIT / CVS report, Informatics Dept., Universität Kaiserslautern, Sept. 1986 
  228. (r) (w. R. Hauck): Simulator Specification for CVS_BK; ESPRIT/ CVS report, Informatics Department, Universität Kaiserslautern, Februar 1987                                     
  229. (r) (w. R. Hauck): A Behavioural / Non-procedural Mixed-Level Simulator for Digital VLSI Systems; ESPRIT report, CS Deptartment, Universität Kaiserslautern, Februar 1987
  230. (r) (w. R. Hauck, K. Lemmert, A. Wodtko): KARL-4 and SCIL-3 Grammar (Draft); ESPRIT / CVS report, Deptartment of Computer Science, Kaiserslautern University, July 1987      
  231. (r) (w. R. Heinen): Benutzungsanleitung für KARL-3 auf ATARI-ST; Bericht, Fachbereich Informatik, Universität Kaiserslautern, 1987     - translation of title -
  232. (r) (w. G.Alfs): Design and Implementation of a Heuristic Search Algorithm for the KARATE System; Interner Bericht Nr. 183 / 88, Fachbereich Informatik, Universität Kaiserslautern, 1987
  233. (r): Seminar "Innovative Prozessor-Architekturen"; Winter-Semester 1987/88, Fachbereich Informatik, Technische Universität Kaiserslautern    <PDF_T_1>    <PDF_T_2>    <PDF_T_3>   
  234. (r) (w. J.Blödel, W.Nebel, M.Ryba): EDIF Notation for Layout / Circuit Relations; Interner Bericht Nr. 179 / 88, Fachbereich Informatik, Universität Kaiserslautern, 1987         
  235. (r) (w. J.Blödel, W.Nebel, M.Ryba): Automatische Extraktion von Register-Transfer-Beschreibungen aus dem Layout integrierter Schaltungen; Bericht  180/88, Fb Informatik, Univ, Kaiserslautern, 1987   - translation of title -
  236. (r) (w. A.Hirschbiel, M.Weber): MOM - Map Oriented Machine - An Innovative Computing Architecture; Interner Bericht Nr. 181 / 88, Fachbereich Informatik, Universität Kaiserslautern, 1987     <PDF>    <photos> 
  237. (b)   (invited 5 day course: VLSI-System-Entwurf; incl. Kursunterlagen für die CCG (Carl-Cranz-Ges., c/o DLR Oberpfaffenhofen), 5-tägiger Kurs in Oberpfaffenhofen (Bayern)  1987         - translation of title -
  238. (b)   (invited 2 day course) VLSI-System-Entwurf für Manager; incl. Kursunterlagen CCG (Carl-Cranz-Ges., c/o DLR Oberpfaffenhofen), 2-tägiger Kurs in Oberpfaffenhofen (Bayern) 1987        - translation of title -    
  239. 167 b (B) ( Book Co-Author) T. Ohtsuki, Albert E. Ruehli, Reiner W. Hartenstein: Circuit Analysis, Simulation, and Design (Advances in CAD for VLSI); North Holland / American Elsevier, 1987    
  240. (g) (w. J.Blödel, W.Nebel, M.Ryba) EDIF Notation for Layout/Circuit Relations in: F.J.Rammig (ed.) : Tool Integration and Design Environments, North Holland, Amsterdam / New York 1988         
  241. (g) (w. J.Blödel, W.Nebel, M.Ryba): A Technology Description Method for Generalized Layout/Circuit Relations in: Microprocessing and Microprogramming 23, North Holland Publ., 1988, pp. 15 - 20
  242. (g) (w. A.Hirschbiel, M.Weber): MOM - Map oriented Machine; in: E.Chiricozzi & A.D'Amico : Parallel Processing and Applications, North-Holland, Amsterdam / New York, 1988     <PDF>    <photos> 
  243. (g) (w. A.Hirschbiel, M.Weber): MOM - Map oriented Machine; in: Ambler, Agrawal, Moore: Hardware Accelerators, Adam Hilger, 1988     <PDF>    <photos>  <pdf-2> 
  244. /g)   R. Hartenstein, A. Hirschbiel, M. Weber: MOM - Map Oriented Machine; Conference on Parallel Processing and Applications, L'Aquila, Italien, 1987     <PDF>  <pdf-2>   <photos> 
  245. (g) (w. A.Hirschbiel, M.Weber): Patil Array - A Petri Net Hardware Implementation;  2nd Int'l Conf. on Computer Technology, Systems, and Applications (Compeuro 88); 11-14 Apr 1988, Brussels, Belgium;   <pdf>        
  246. (g) (w. K.W.Jörg, U.Welters): MLED - Ein Mehrebenen-Graphik-Editor für den VLSI Entwurf; in: Valk (ed.): Proceedings 18. GI-Jahrestagung, Springer-Verlag, Berlin / Heidelberg / New York, 1988  - translation of title
  247. (g) (w. M.Ryba): Partitionierungsschemata für Rechnerstrukturen; in: Valk (ed.) : Proceedings 18. GI-Jahrestagung, Springer-Verlag, Berlin / Heidelberg / New York, 1988     - translation of title - 
  248. (g) (w. G.Alfs, M.Riedmüller): SCIL-III - a language for simulator and tester activation; Proc. 2nd ABAKUS Workshop, Innsbruck, Austria, 1988                                
  249. (g) (w. G.Alfs, A.Wodtko): The KARATE system - Integrating functional test development into the KARL design environment; Proc. 2nd ABAKUS Workshop, Innsbruck, Austria, 1988
  250. (g) (w. G.Alfs, A.Wodtko): The KARL/KARATE system: Automatic Test Pattern Generation Based on RT Level Descriptions; Proc. International Test Conference, Washington DC, USA, 1988           
  251. (g) (w. G.Alfs, M.Riedmüller, A.Wodtko): Integration of Simulation, Test Development and Test in a High Level Design Environment; Proceedings of the IFIP TC10 Working Conference, Pisa, Italy, 1988
  252. (g) (w. G.Alfs, A.Wodtko): The KARL/KARATE system: Integrating Functional Test Development in a CAD Environment for VLSI; Proc Int'l Conf. on Computer Design (ICCD), Port Chester, NY, USA, 1988    
  253. (g) (w. G.Alfs, A.Wodtko): Integration der Testentwicklung in den Entwurf von Vollkundenschaltungen; ITG Fachbericht 103, ITG Fachtagung Mikroelektronik f. die Informationstechnik, Berlin, 1988 - translation of title
  254. (g) (w. J.Blödel, M.Ryba): EDIF Notation for the Description of Universal Rules for Parameter and Device Extraction from Mask Layout; 4th E.D.I.F. User Group Workshop, Colorado Springs, CO, U.S.A., 1988         
  255. (g) (w. J. Blödel, M. Ryba): PAGE - An ELL(1) based EDIF Parser Generator; Proceedings of the 2nd European EDIF Forum, Amsterdam, Holland, 1988
  256. (g) (w. J. Blödel, M. Dörr, M. Ryba): AMBROSE: Advanced Modular Browsing System for EDIF Graphical Data; Proceedings of the 2nd European EDIF Forum, Amsterdam, Holland, 1988          
  257. (g) (w. J. Blödel): The Work and the Activities of the European EDIF Working group Technology - A Survey; Proceedings of the 2nd European EDIF Forum, Amsterdam, Holland, 1988          
  258. (g) (w. R. Hauck, K. Lemmert): Some new features in KARL-4 and superKARL - A Survey; Proc. 2nd ABAKUS Workshop, Innsbruck, Austria, 1988         
  259. (g) (w. K.W.Jörg, U.Welters): MLED - A multiple view graphics editor for VLSI design; Proc. 2nd ABAKUS Workshop, Innsbruck, Austria, 1988            
  260. (g) (w. K. Lemmert ): A systolic design system using KARL; Proceedings 2nd ABAKUS Workshop,   Innsbruck, Austria, 1988                                                             
  261. (g) (w. R. Hauck): KARL-4 - A hardware description language for the design and synthesis of digital hardware; Proc. 2nd ABAKUS Workshop, Innsbruck, Austria, 1988           
  262. (b)  (invited 5 day course) VLSI-System-Entwurf; incl. Kursunterlagen für die CCG (Carl-Cranz-Ges., c/o DLR Oberpfaffenhofen), 5-tägiger Kurs in Oberpfaffenhofen (Bayern) 1988          translation of title  
  263. (b) (invited 2 day course) VLSI-System-Entwurf für Manager; incl. Kursunterlagen für die CCG (Carl-Cranz-Ges., c/o DLR Oberpfaffenhofen), 2-tägiger Kurs in Oberpfaffenhofen (Bayern) 1988        - translation of title
  264.      Using the wrong browser? This paragraph should have the number 264
  265. (g) (w. G. Alfs, A. Ast, A. Wodtko): Explizite Fehlermodellierung mit dem KARATE- System; 4th E.I.S.-Workshop, 21-22. Feb 1989, Bonn, Germany, GMD- Studien Nr.155, St Augustin, 1989  translation of title
  266. (g) (w. K. Lemmert): SYS3 - Ein systolisches Synthesesystem; 4th E.I.S.-Workshop, 21-22. Feb 1989, Bonn, Germany, GMD-Studien Nr.155, Sankt Augustin, 1989     - translation of title -
  267. (g) (w. K. Lemmert): CHDL-Based CAD System for the Synthesis of Systolic Architectures; International Workshop on Systolic Arrays, May 1989, Killarney, Ireland 
  268. (r) Schlußbericht zum E.I.S.-Projekt; Teilvorhaben der Universität Kaiserslautern; Mai 1989 
  269. (g) (w. A.G. Hirschbiel, M.Weber): Mapping Systolic Arrays onto the Map-Oriented Machine (MoM); International Workshop on Systolic Arrays, May 1989, Killarney, Ireland   <PDF>   <photos>       
  270. (g) (w. A.G. Hirschbiel, M.Weber): MOM - a partly custom-design architecture compared to standard hardware; IEEE Compeuro, 8-12 May 1989, Hamburg Germany, 1989,   <photos>   <PDF>       
  271. (b)   (invited 2 day course): VLSI-System-Entwurf für Manager; incl. Kursunterlagen CCG (Carl-Cranz-Ges., c/o DLR Oberpfaffenhofen), 2-tägiger Kurs in Oberpfaffenhofen (Bayern) 1989        - translation of title -    
  272. (g) (w. K. Lemmert): SYS3 - A CHDL-Based Systolic Synthesis System; International Conference on Computer Hardware Description Languages (CHDL'89),  19-21 June 1989 Washington, D.C., U.S.A. 
  273. (g) (w. G.Alfs, A. Wodtko): Explicit Fault Modelling and Hierarchical Test Pattern Generation in the KARATE-System;  EUROMICRO Symposium 1989, 4-8 Sep 1989, Cologne, Germany
  274. (g) (w. K. Lemmert, M. Riedmüller): Synthesis of Systolic Architectures Using the SYS3-System; in: EUROMICRO Symposium '89, 4-8 Sep 1989, Cologne, Germany, Elsevier Science Publishers, 1989
  275. (g) (w. J. Blödel): Extending EDIF for Technology Adaptable Mask Artwork Synthesis, 5th EDIF User Group Workshop; Sep 1989, San Jose, CA, USA,          
  276. (g) (w. M. Schubert, J. Blödel et al.): Extending EDIF for Technology Data, The 5th EDIF Users Group Workshop Digest of Technical Papers, San Jose, CA., USA, September 1989        
  277. (b)   (invited 5 day course ): VLSI-System-Entwurf; (mit Kursunterlagen) für die CCG (Carl-Cranz-Ges.), c/o DLR Oberpfaffenhofen), September 1989  Oberpfaffenhofen (Bayern), Germany     
  278. (b) Der Rechner aus dem Elfenbeinturm; Markt & Technik, Nr. 44/89, Oct. 1989.     - translation of title -
  279. (N) SYS3: was ist neu? - Notiz, 1989    <PDF>      -  
  280. (b) (w. J. Blödel): Extending EDIF for Technology Adaptable Mask Artwork Synthesis, 3rd European EDIF Forum, October 1989, Königswinter, Germany         
  281. (g) (w. A.G. Hirschbiel, M.Weber): A Pseudo Parallel Architecture for Systolic Algorithms. Proc. of the International Conference on VLSI and CAD, 17-20 Oct 1989, Seoul, Korea   <PDF> 
  282. (g) (w. M. Schubert, J. Blödel et al.): Extending EDIF for Technology Data, 3rd European EDIF Forum, October 1989, Königswinter, Germany         
  283. (b) Xputer: Rechner nach neuartigen Prinzipien; GI Informatik Spektrum, Dezember 1989, Springer-Verlag, Berlin / Heidelberg / New York, 1989.     - translation of title -     <PDF>  <inforapid>   <freenet>        The datastream-driven Anti Machine computing paradigm 
  284. (g) (w. A.G. Hirschbiel, M.Weber): A Pseudo Parallel Architecture for Systolic Algorithms. Proc. of the IFIP Workshop on Parallel Architectures on Silicon, December 89, Grenoble, France, .    <PDF>
  285. (r) (w. R. Hauck): CVS_BK Language Reference Manual; CVS-rep. 1989 CSELT, Torino, Italy, TU Kaiserslautern, Germany                                                     
  286. (g) (w. A. Ast, A.G. Hirschbiel, M. Riedmüller, K. Schmidt, M.Weber): Using Xputers as Inexpensive Universal Accelerators in Digital Signal Processing; Bilkent'90 International Conference on New Trends in Communication, Control and Signal Processing; Juli 1990, Ankara, Turkey,     <PDF>    <inforapid>   <freenet>    
  287. (f) (folder): Xputers - A New Machine Paradigm - A NEW R&D Area --- Industrial Competitiveness by drastically more performance on much less hardware. 1990, Bruchsal, Germany     <PDF>
  288. (r) Xputers: a new R&D area; report, Fachber. Informatik, Univ. Kaiserslautern, 1990     The KressArray: generalization of the systolic array - supporting the anti machine      <PDF>
  289. (g) (w. J. Blödel): Technology Adaptable Device Generator as a Frontend for Layout Synthesis Tools; Electronic Design Autoimation Conference (EDAC '90),  March 1990, Glasgow, UK
  290. (g) (w. J. Blödel): A Data Model for VLSI Technology Data, 6th EDIF User Group Workshop - EDIF World 1990, Sep 1990, New Orleans, LA, USA,          
  291. (g)(w. J. Blödel): A Data Model for VLSI Technology Data; 4th European EDIF Forum, Oct 90, Daresbury, UK,
  292. (m) Xputers - A New Machine Pardigm - A New R&D Area; special interest group flyer, Kaisersl. 1990;   <pdf>
  293. (g) (w.A. Hirschbiel, M.Weber): Xputers - An Open Family of Non von Neumann Architectures; Proceedings 11th ITG/GI-Conferenz Architektur von Rechensystemen, March 1990, Munich, Germany, VDE-Verlag 1990.  <PDF>   <PDF>    also see Christophe Bobda        
  294. (s) (w. A. Hirschbiel, M.Weber): Non-von-Neumann: Is the Technology Transfer an Achievable Goal ? version as submitted to ITG/GI-Konferenz Architektur von Rechensystemen, March 1990, Munich, Germany (for the final version due to PC proposals during the reviewing process see above under Compeuro)     <PDF>    <inforapid>   <freenet>     
  295. (g) (w. A.Hirschbiel, M.Weber): The Machine Paradigm of Xputers and its Application to Digital Signal Processing Acceleration; International Workshop on Algorithms and Parallel VLSI Architectures, Pont-à-Mousson, France, June 1990      <PDF>              ("Algorithms & parallel VLSI architectures")
  296. (k) (invited presentation) Xputer - Novel High Performance Computers: Principles and Implemenation; IBM Research Laboratories, Boeblingen, Germany June 21, 1990          
  297. (g) CASHE using a new Machine Paradigm; The 2nd IFIP International Workshop on Hardware/Software Codesign (Codes/CASHE’93), May 24 – 27, 1993, Innsbruck, Austria. <PDF>    
  298. (g) (w. A.Hirschbiel, M.Weber): Using Xputers as Universal Accelerators for Neuro Network Simulation and its Applications; International Neural Network Conference, INNC 90, Paris, France, Juli 1990.      <PDF>    
  299. (g) (w. A.Hirschbiel, M.Weber): The Machine Paradigm of Xputers and its Application to Digital Signal Processing Acceleration; 1990 International Conference on Parallel Processing (ICPP 90), August 1990,   St. Charles, Illinois, USA,     <PDF>    <PDF2>    <inforapid>   <freenet>     
  300. (g) (w. A.Hirschbiel, M.Weber): A Novel Paradigm of Parallel Computation and its Use to Implement Simple High Performance Hardware; CONPAR '90 - VAPP IV, Sep 1990, Zürich, Switzerland   <PDF>     xx!
  301. (g) (w. A.Hirschbiel, K. Schmidt, M.Weber): A Novel ASIC Design Approach based on a New Machine Paradigm; European Solid-State Circuits Conf. '90, Sep 90, Grenoble, France,   <pdf>   <pdf>   Invited Reprint:    in IEEE-JSCC - Journal of Solid State Circuits Systems, July 1991             
  302. (g) (DM 1000,-- Best Paper Award)   (w. A.Hirschbiel, M. Riedmüller, K. Schmidt, M.Weber): Automatic Synthesis of Cheap Hardware Accelerators for Signal Processing and Image Preprocessing; 12. DAGM-Symposium Mustererkennung,  Sept. 1990, Oberkochen-Aalen, <award>  <pdf> <more awards> 
  303. (g) (w. A.Hirschbiel, K.Lemmert, M. Riedmüller, K. Schmidt, M.Weber:) Xputer Use in Image Processing and Digital Signal Processing; SPIE Visual Communication and Image Processing'90, Lausanne, Schweiz, Oct 1990.
  304. (g) (w. A.Hirschbiel, M.Weber): Xputers: Very High Throughput by Innovative Computing Principles; 5th Jerusalem Conf. on Information Technology (JCIT), Jerusalem, Israel, Oct 1990, IEEE CS Press, 1990.     
  305. (g) (w. A. Hirschbiel, M. Riedmüller, K. Schmidt, M. Weber): A Flexible Hardware Accelerator and its Applications in EDA; The 16th CAVE Workshop in Ghent, Belgium, Dezember 1990          
  306. (b) (w. A.Hirschbiel, M.Weber): Rekonfigurierbare ALU erlaubt Parallelisierung auf unterster Ebene; VMEbus, Februar 1990. - translate title   <pdf>        
  307. (r) (w. A. Ast, P. Bittner, J. Blödel, M. Weber, U. Zahm): Anforderungen an die WZ-Schnittstelle aus Tool-Sicht: Bericht DASSY-Projekt, Univ. Kaiserslautern, Fachbereich für Informatik, Febr 1990 -  translation of title
  308. (N) (w. A.st, H. Reinig, M. Riedmüller, K. Schmidt) Übersicht über die Hard- und Softwarearbeiten für die MoM3; TU Kaiserslautern, 1991   <pdf>    
  309. (r) (w. A. Ast, J. Blödel): Technology Data for Circuit Extraction and Layout Synthesis: Report DASSY-Project, Univ. Kaiserslautern, Mrz 1990
  310. (r) (w. A. Ast, J. Blödel): Anforderungen an eine Werkzeugschnittstelle für Digitalsimulatoren und Testerzeuger auf der RT-Ebene, Bericht DASSY-Projekt, Univ. Kaiserslautern, Informatik, März 1990   -xlate title -
  311. (r) (w. A. Ast, J. Blödel): Configuration Data for fault-model-independent Automatic Test Generators; Bericht zum DASSY-Project, Universität Kaiserslautern, Fachbereich für Informatik, März 1990
  312. (r) (w. A. Ast, J. Blödel et. al.): Anforderungen an die Werkzeugschnittstelle aus Sicht der Tools; Bericht zum DASSY-Projekt, Ges. für Mathematik und Datenverarbeitung, St. Augustin, März 1990    - translation of title -
  313. (r) (w. A. Ast, J. Blödel, U. Jasnoch, J. Reedmer, M. Ungerer): Konzept der prozeduralen Werkzeugschnittstelle im DASSY-Prototypen; Bericht DASSY-Projekt, Universität Kaiserslautern / TH Darmstadt, Okt. 1990     xlate title -
  314. (r) (w. J. Blödel et. al.): General Unit Definition for EDIF; EDIF Device Modeling & Verification TSC (Technical Subcommittee), Proposal DM&V No. 1, May 1990         
  315. (r) (w. J. Blödel): Topological Device Descripiton for EDIF; Report EDIF Device Modeling & Verification; IEEE EDIF Standardization Committee, TSC (Technical Subcommittee) on Technology, August 1990         
  316. (r) (w. A.G. Hirschbiel, M. Riedmüller, K. Schmidt, M.Weber): A Novel Paradigm of Parallel Computation and its Use to Implement Simple High Performance Hardware; Univ. Kaiserslautern, Informatik, 1990  <PDF>    ¦¦¦¦¦¦¦¦¦¦¦
  317. (bj) (w. A.G. Hirschbiel, M.Weber): Rekonfigurierbare ALU erlaubt Parallelisierung auf unterster Ebene; VMEbus, Februar 1990.    translation of title     
  318. (g) Xputer: ein neues Maschinen-Paradigma für Höchstleistungsrechner; Lessacher Informatik-Kolloquien, Lessach, Austria, 18.-21. Sep 1990, Springer-Verlag 1991 - translation of title <inforapid>   <freenet>    
  319. (r) (w. A.G. Hirschbiel, M. Riedmüller, K. Schmidt, M.Weber): Xputers: a High performance Machine Paradigm - Hardwre Principles, Programming, Compilation Techniques; in: K. Ecker, R. Hirschberg (editors): "Workshop über Parallelverarbeitung, Lessach, Austria, 17. - 21. September 1990" Institut für Informatik, TU Clausthal-Zellerfeld, Germany  <PDF>                                      
  320. (g) (w. A.G. Hirschbiel, M.Weber): A Novel Paradigm of Parallel Computation and its Use to Implement Simple High Performance Hardware; InfoJapan'90 - memorating 30th Anniversary Computer Society of Japan, Tokyo, Japan, 1990, Invited Reprint: in Future Generation Computer Systems 7 91/92, North Holland  <PDF>   
  321. (kj) (invited reprint) (w. A.G. Hirschbiel, M. Riedmüller, K. Schmidt, M.Weber): A Novel ASIC Design Approach Based on a New Machine Paradigm; IEEE-JSSC - Journal of Solid State Circuits, July 1991  <PDF>
  322. (gj) (w. K. Schmidt, H. Reinig, M. Weber): A Novel Compilation Technique for a Machine Paradigm Based on Field-Programmable Logic; in Will Moore, Wayne Luk (ed.): Field Programmable Logic and Applications, Abingdon EE&CS Books, Abingdon, 1991    <PDF>    
  323. (g) (w. J. Blödel, M. Brandstetter, P. Conradi, W. Drangmeister, P. Jores, M. Ryba, D. Schröder): EDIF Extensions Proposed by the EDIF Device Modelling & Verification TSC; 5th European EDIF Forum; La Grande Motte, France, Oct 10-11, 1991         
  324. (g) (w. J. Blödel, P. Conradi): Schnittstellen zwischen CAD und TCAD, 5. E.I.S.-Workshop, Dresden, 8.-9. April 1991      - translation of title -
  325. (g) (honorable mention) (w. A. G. Hirschbiel, M. Riedmüller, K. Schmidt, M.Weber): A High Performance Machine Paradigm Based on Auto-Sequencing Data Memory; HICSS - 24th Hawaii Int'l Conference on System Sciences, Koloa Hawaii, January 1991    <PDF>   <award>   <PDF-2>  <pdf-3>  <pdf-4>     
  326. (g) (w. H. Reinig, M. Riedmüller, K. Schmidt): A Novel Computational Paradigm: Much More Efficient Than Von Neumann Principles; The 13th IMACS World Congress, Dublin Ireland, July 1991    <PDF>        ¦¦¦¦¦¦¦¦¦¦¦
  327. (g) (w. K. Schmidt, H. Reinig, M. Weber): A Novel Compilation Technique for a Machine Paradigm Based on Field-Programmable Logic; Int'l Conf. on Field Programmable Logic and Applications, Oxford 1991 <PDF>   
  328. (r) (w. J. Blödel): Parameterized Topological Device Descriptions, Proposal for EDIF Version 2 0 5, Version 1.0, Report über das DASSY Projekt, University of Kaiserslautern, January 1991         
  329. (r) (K. Schmidt:) Xputer - eine Alternative zum Computer ? UNI SPECTRUM, Kaiserslautern, 1990   <pdf>
  330. (r) (w. J. Blödel, M. Brandstetter, W. Drangmeister, D. Schröder): Device Descriptions, EDIF Version 205, Proposal No. DM&V-3 V. 1.0; Interner Bericht Nr. 211/91, Informatik, Univ. Kaiserslautern, 31. Mai 1991
  331. (r) (m. A. Hirschbiel, M. Riedmüller, K. Schmid, M. Weber:) Xputers: A New R&D Area; report, Fachbereich Informatik, TU Kaiserslautern, 1991    
  332. (r) (w. J. Blödel, D. Schröder, W. Wilkes): DASSY - Übersicht über die Informationsmodelle; Bericht zum Meilensteintreffen M3; DASSY Projekt; 23. Juli 1991     - translation of title
  333. (r) (w. J. Blödel): Report on Extraction: Second Periodic Progress Report, PATMOS Projekt, Universität Kaiserslautern, Dezember 1991
  334. (r) (w. M. Riedmüller, K. Schmitt, M. Weber): A Novel Asic Design Approach Basd on a New Machine Paradigm; Interner Bericht 212/91, Universität Kaiserslautern, Fachbereich Informatik, Juli 1991
  335. Franz-Josef Brandenburg, Werner Freise, Winfried Görke, Reiner W. Hartenstein, P. Kühn, H. J. Schmitt: Gemeinsame Stellungnahme der Fakultätentage Elektrotechnik und Informatik zur Abstimmung ihrer Fachgebierte im Bereich Informationstechnik; GI Informatik-Spektrum, 1991 
  336. (r) (w. S. Perdomo, A. Nuñez, et al.): Report on Interconnect Modelling: Second Periodic Progress Report, PATMOS Projekt, Universität Kaiserslautern, Dezember 1991
  337.      Using the wrong browser? This paragraph should have the number 337
  338. (bj) (w. A. Ast, et al.): High Performance VLSI Signal Processing; in (Hrsg: M. Bayoumi): VLSI Image and Signal Processing; Kluwer Akademic Publishers, Boston, 1992.
  339. (i) (n. e. Interview d. Klaus Schlüter) Xputer - Innovation für den Multimedia-Markt; Funkschau 5/1992   <pdf>
  340. (g) (w. A. Ast, H. Reinig, K. Schmidt, M. Weber): A Novel High-performance Machine Paradigm and ASIC Design Methodology; Int'l Design Automation Worksh.(Russian W.), 29. - 30. 06. 92, Moskau,  <PDF> <PDF>    
  341. (bj) (w. A. Hirschbiel,K. Schmidt,M. Weber): A Novel Paradigm of Parallel Computation and its Use to Implement Simple High-Performance Hardware, inside Future Generation Computer Systems 7 91/92, North Holland: an Invited reprint of InfoJapan'90- , Tokyo, Japan, 1990      <PDF>    
  342. (g) (w. A. Ast, et al.): Ein neuartiger Ko-Prozessor zur Akzeleration von Algorithmen mit regelmäßigen Datenabhängigkeiten, GI/ITG Workshop Hochintegrierte Schaltungen für Parallelarchitekturen, 2. - 3.7.92, Irsee, Germany, 1992     - xlate title                       
  343. (g) (w. H. Reinig): Der GAG-Adreßgenerator und seine Anwendung als Akzelerator, GI/ITG Workshop Hochintegrierte Schaltungen für Parallelarchitekturen, July 2, 1992, Irsee, Germany,   xlate title   <pdf>   <pdf2> <pdf3>
  344. (B) ( Book Editor w. H. Gruenbacher): " Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping; Second International Conference on Field-Programmable Logic and Applications, Vienna, Austria, August/September 1992"; Lecture Notes in Computer Science (LNCS No. 705), Springer-Verlag 1993 - ISBN 3-540-57091-8       <Reiner's books>        <the conference>     
  345. (g) (w. A. Ast, R. Kress, H. Reinig, and K. Schmidt): Novel High Performance Machine Paradigms and Fast-Turnaround ASIC Design Methods: a Consequence of, and a Challenge to, Field-programmable Logic ; 2nd Int'l Workshop on Field-Programmable Logic and Applications, August 31 - September 02, 1992, Vienna University of Technology, Vienna, Austria, 1992, <PDF>      
  346. (g) (w. E. Melcher, M. Dana, et al.): CMOS Interconnect Modelling for Timing Analysis, EUROMICRO Symp., short notes, 14.-17. Sep 1992, Paris, France, 1992
  347. (ti) Xputer: ein Neues Maschinen-Paradigma; Kolloquium, Univ. Augsburg, Feb 2, 1993 <PDF>   <PDF>    
  348. (g) (w. E. Melcher, M. Dana, et al.): Interconnect Characterization of CMOS Circuits for Timing Analysis; Proceedings of the European Workshop on Power and Timing Modelling, 18.09.92, Paris, France, 1992
  349. (g) (w. H. Reinig, M. Weber): Design of an Address Generator, The 3rd Eurochip Workshop on VLSI Design Training, 30.9 - 2.10.92, Grenoble, France, 1992     <PDF>   <pdf2>
  350. (ti) (invited presentation): Xputer: ein neues Hochleistungs-Maschinenparadigma; Fa. Hermstedt, Mannheim, Germany, Oktober 1992   
  351. (B) ( Book Editor, w. D. Auvergne.): Power and Timing Modelling for Performance of Integrated Circuits; Proc. 3rd Int'l Workshop on Power and Timing Modelling, Optimization and Simulation (PATMOS),La Grande Motte, France, Oct 1993    <conference>  <PATMOS>       <Reiner's books> 
  352. (B) ( Text Book): R. Hartenstein: Wozu noch Mikro-Chips? Einführung in Methoden der Technischen Informatik; ISBN 3-929814-00-5, IT Press Verlag, 1993  - translation of title -       <toc>
  353. (g) KARL and ABL, in J. P. Mermet (editor): Fundamentals and Standards in Hardware Description Languages; Kluwer Academic Publishers, Dordrecht, pp. 447-466, 1993. <transscript>
  354. (g) (w. E. Melcher, M. Dana, et al.): CMOS Interconnect Timing Analysis; in Microprocessing and Microprogramming, North-Holland Publishing Co., Jan. 1993
  355. (s) Hardware/Software Co-Design; 3rd Int'l Worksh on Field-Programmable Logic & Appl., Oxford UK, Sep 1993
  356. (g) (w. A. Ast, J. Becker, R. Kress, H. Reinig, and K. Schmidt): MoPL-3: A New High Level Xputer Programming Language; The 3rd International Workshop on Field Programmable Logic & Appl., Oxford, UK, September 1993 <PDF>  <inforapid>  <freenet> <home>  <JPG-zig-zag-scan-animation>       ¦¦¦¦¦¦¦¦¦¦¦
  357. (g) (invited Paper) Xputer: ASIC or Standard Circuit? GME Fachtagung Mikroelektronik, Dresden, März 1993, VDE-Verlag   <PDF>-2 figs fehlen              
  358. (r) The History of KARL and ABL; (Interner Bericht Nr. 232/93), Informatik, TU Kaiserslautern, April 1993
  359. (r) Xputer-related Literature; Interner Bericht, Informatik, TU Kaiserslautern, 1993  <html>  <html2>
  360. (m) Early Reconfigurable Computing Start-ups; memo, 1993,  <pdf> 
  361. (N) Veröffentlichungen aus der Zeit an der Fakultät für Informatik der Universität Karlsruhe; interer Bericht, CSG, TU Kaiserslautern, 1993 <PDF>
  362. (B) ( Book Editor w. M. Servít): Field-Programmable Logic: Architectures, Synthesis, and Applications; Lecture Notes in Computer Science, ISBN 3-540-58419-6, Springer-Verlag 1994.      <about this conference>  What means Reconfigurable Computing? See   Tibor Krajčovič, PhD.        <Reiner's books>
  363. (bj) (w. A. Ast, H. Reinig, K. Schmidt, M. Weber): A General Purpose Xputer Architecture derived from DSP and Image Processing; in M.A. Bayoumi (ed.): VLSI Design Methodologies for Digital Signal Processing Architectures, Kluwer Academic Publishers, p. 365-394, 1994.          
  364. (g) (w. R. Kress, H. Reinig): A Reconfigurable Data-diven ALU for Xputers; IEEE Workshop on FPGAs for Custom Computing Machines, FCCM'94, Napa, CA., April 1994.    <PDF>    <inforapid>   <freenet>          
  365. (g) (w. R. Kress, H. Reinig): An FPGA Architecture for Word-Oriented Datapaths; Canadian Workshop on Field-Programmable Devices, FPD'94, Kingston, Ontario, June 13-16, 1994    <PDF>
  366. (g) (w. R. Kress, H. Reinig): A Dynamically Reconfigurable Wavefront Array Architecture for Evaluation of Expressions; Proceedings of the Int. Conference on Application-Specific Array Processors, ASAP'94, San Francisco, IEEE Computer Society Press, Los Alamitos, CA, Aug. 1994    <PDF>      
  367. (g) (w. R. Kress, H. Reinig): A Reconfigurable Arithmetic Datapath Architecture: GI/ITG-Workshop  "Architekturen für hochintegrierte Schaltungen", Schloß Dagstuhl, Bericht 303, pp. 53-59, Juli 1994    <PDF>    
  368. (g) (w. Rainer Kress and Helmut Reinig): A New FPGA Architecture for Word-oriented Datapaths; The 4th International Workshop on Field Programmable Logic and Applications, FPL'94, Prague, Czechia, September 7-10, 1994,  Springer-Verlag, 1994    <PDF>         
  369. (g) (w. A. Ast, J. Becker, R. Kress, H. Reinig, K. Schmidt): Data-procedural Languages for FPL-based Machines; 4th International Workshop on Field Programmable Logic and Applications, FPL'94, Prague, Czechia, September 7-10 1994, Springer Verlag <pdf>         
  370. (r) Xputers and their relations to H/S Codesign; internal report, Univ. Kaiserslautern, Sep 1994     <PDF>    
  371. (f) (fragment): Xputers - and their relations to H/S Codesign -. Sep 1994, Informatik, TU Kaiserslautern, Germany     (the first of 22 pages History of Xputers)     <gif>    
  372. (g) (w. Karin Schmidt): Parallelizing Compilation for a Novel Data-Parallel Architecture; in; J. P. Gray, F. Naghdy (eds.), PCAT-94, Parallel omputing: Technology and Practice, Wollongong, Australia, Nov. 1994    <PDF>    
  373. (g) Die "Neue Mikroelektronik" in der Informatik: Voraussetzungen und Auswirkungen; GI - 12. Jahrestagung, Kaiserslautern, 5. -7. Okt 1982,     
  374. (invited tutorial) Xputers, a New Computational Paradigm; Inst. of Microelectronics; Singapore, Nov 1994
  375. (g) (w. K. Schmidt): A Restructuring Compilation Method for the Xputer Paradigm: IWPP 94, Proceedings of the Int. Workshop on Parallel Processing, Bangalore, India, Dec. 1994    <PDF>   

  376. (g) (w. K. Schmidt): A Restructuring Compilation Method for the Xputer Paradigm: Journal of the Brasilian Computer Society; Special Issue on Electronic Design Automation, no.2, vol. 2, Nov 1995    <PDF>   

  377. (r) Hardware/Software Codesign; Internal Report No. 246/94, University of Kaiserslautern, 1994.

  378. (bj) Algebraischer Entwurf regelmaessiger Schaltungen; in: R. Hartenstein: Standort Deutschland: Wozu noch Mikrochips? Einfuehrrung in Methoden der Technischen Informatik; ITpress Verlag, 1994 --  pdf  --  fm


  379. (g) (w. K. Schmidt): Combining Structural and Procedural Programming by Parallelizing Compilation; Proceedings of the Symposium on Applied Computing, Nashville, TN, Feb. 1995    <PDF>     
  380. (bj) (w. J. Becker, et al.): High-Performance Computing Using a Reconfigurable Accelerator; CPE Journal, Special Issue of Concurrency: Practice and Experience, John Wiley & Sons Ltd., 1995    <PDF>       
  381. (bj) (w. J. Becker, et al.): A Novel Machine Paradigm to Accelerate Scientific Computing; Computer Science and Informatics Journal, Special Issue of Scientific Computing, Computer Society of India, 1996 <PDF>         
  382. (k)  (handout and presentation of an invited full day VLSI Design Course) R. Hartenstein (chair), J. Becker, R. Kress, W. Reinig: Xputers: Principles, Architectures, Performance; Tutorial on Xputers; LIRMM, University of Montpellier, Montpellier, France, Sept. 1995       
  383. (gj) (w. J. Becker, et al.): A Novel Two-Level Hardware/Software Co-Design Framework; Journal of the Brazilian Computer Society, Special Issue on Electronic Design Automation, Dec. 1995    <PDF>
  384. (gj) Hardware/Software Co-Design; GI Informatik-Spektrum, 1995     - translation of title -
  385. (gj) Custom Computing Machines; GI Informatik-Spektrum, 1995      <pdf>
  386. (g) (w. K. Schmidt): A Restructuring Compilation Method for the Xputer Paradigm: Journal of the Brasilian Computer Society; Special Issue on Electronic Design Automation, no.2, vol. 2, Nov 1995    <PDF>   

  387. (g) (w. J. Becker, et al.): CoDe-X: A Novel Two-Level Hardware/Software Co-Design Framework; 9th International Conference on VLSI Design, Bangalore, India, Jan. 1996    <PDF>   <PDF> 
  388. (g) (w. J. Becker, et al.): A Reconfigurable Parallel Architecture to Accelerate Scientific Computation; International Conference on High Performance Computing, New Delhi, India, Dec. 1995 <pdf>    
  389. (g) (w. J. Becker, et al.): A Profiling-driven Hardware/Software Partitioning of High-Level Language Specifications; Workshop on Logic and Architecture Synthesis, Grenoble, France, Dec. 1995
  390. (k) (keynote address) Custom Computing Machines - an overview; Workshop on Design Methodologies for Microelectronics, DMM'95, Smolenice Castle, Czech Republic, Sept. 1995     <pdf>     <doc>       <keynotes>    
  391. (g) (w. J. Becker, et al.): A Two-Level Hardware/Software Co-Design Framework for Automatic Accelerator Generation; Workshop on Design Methodologies for Microelectronics, DMM'95, Smolenice Castle, Czech Republic, pp. 145-152, Sept. 1995    <PDF>  <pdf-2> 
  392. (g) (w. H. Reinig): Novel Sequencer Hardware for High-Speed Signal Processing; Workshop on Design Methodologies for Microelectronics, DMM'95, Smolenice Castle, Czech Republic, Sept. 1995    <PDF>
  393. (g) (w. H. Reinig, et al.): A Scalable, Parallel, and Reconfigurable Datapath Architecture; 6th Int'l Symposium on IC Technology, Systems & Applications, ISIC'95, Singapore, Sept. 1995  <PDF>    <pdf-2>    <pdf-3>      
  394. (g) (w. R. Kress): A Datapath Synthesis System for the Reconfigurable Datapath Architecture; Asia and South Pacific Design Automation Conf., ASP-DAC'95, Makuhari, Chiba, Japan, Aug./Sept. 1995    <PDF> <PDF2>  
  395. (g) (w. J. Becker, et al.): A Parallelizing Compilation Method for the Map-oriented Machine; Int'l Conf. on Application-Specific Array Processors, ASAP'95, Strasbourg, France, IEEE CS Pr., July 1995  <PDF>      
  396. (g) (w. J. Becker, et al.): High-Performance Computing Using a Reconfigurable Accelerator; High Performance Computing Symposium, HPCS'95, Montreal, Canada, July 1995    <PDF>   <award>         
  397. (g) (w. H. Reinig, et al.): A Reconfigurable Accelerator for 32-bit Arithmetic; Workshop on Reconfigurable Architectures, Santa Barbara, CA, April 1995    <PDF>
  398. (b) (w. J. Becker, et al.): A Reconfigurable Machine for Applications in Image and Video Compression; European Symposium on Advanced Networks and Services: Conference on Compression Technologies and Standards for Image and Video Compression, Amsterdam, The Netherlands, March 1995    <PDF>       
  399. (r) (w. A. Ast, J. Becker, et al.): Data-procedural Languages for FPL-based Machines; Universität Kaiserslautern, Fachbereich Informatik, Interner Bericht, Nr. 264/95, 1995     <PDF>    
  400. (k) (w.J. Becker, R. Kress, H. Reinig:) A Novel Hardware/Software Co-Design Framework;  Journal of the Brasilian Computer Society: Special Issue on Electronic Design Automation, no.2, vol. 2, pp.16-26, Nov 1995    <PDF>
  401. (g) (w. J. Becker, et al.) A Profiling-Driven Hardware/Software Partitioning of High Level Language Specification; IFIP Int'l Workshop on Logic and Architecture Synthesis, Grenoble, France, 18. - 19. Dec 1995    <PDF>
  402. (p) Unsere Gesellschaft hat Null Bock auf High Tech; DIE WELT, 19. Feb. 1996 xlate title   <text> <Pressespiegel>
  403. (w) (w. J. Becker, A.Hirschbiel, R. Kress, H. Reinig, M. Riedmüller, K. Schmidt, M.Weber): FQA about Xputers; Fachbereich Informatik, TU Kaiserslautern, 1966 <htm>    
  404. (g) (w. J. Becker, et al.) Two-Level Hardware/Software Partitioning Using CoDe-X; IEEE Int'l Workshop on Computer Based System Engineering (CBSE'96), Friedrichshafen, Germany, March 1996   <PDF>       
  405. (g) (w. J. Becker, et al.) Two-level Partitioning of Image Processing Algorithms for the Parallel Map-oriented Machine; ACM/IEEE International Workshop on Hardware/ Software Co-Design Codes/CASHE/CODES'96, Pittsburgh, PA, USA, March 18 - 20, 1996    <PDF> 
  406. (g) (w. J. Becker, M. Herz, R. Kress, U. Nageldinger:) A Partitioning Programming Environment for a Novel Parallel Architecture; The IEEE Internationl Parallel Processing Symposium (IPPS'96), Honolulu, Hawaii, USA, 15-19 April 1996 <PDF>  <pdf2>                     
  407. (b) (w. J. Becker, M. Herz, et al.) A Parallelizing Programming Environment for Embeded Xputer-based Accelerators; High Performance Computing Symp, HPCS'96, Ottawa, Canada, June 1996 <PDF>  <pdf2>   
  408. (B) Null Bock auf High Tech; Arbeitsplatz-Export: nur wegen zu hoher Löhne?; IT Press, 1996 - ISB N 3-929814-06-4     - translation of title - 
  409. (g) (w. R. Kress) An Architecture for Highly Parallel Computer Arithmetic; The 2nd International Conference on Highly Parallel Computing Systems (MPCS'96), Ischia, Italy, May 6 - 9, 1996    
  410. (g) (w. J. Becker, et al.) Application-specific Microprocessor Design Methodologies: General Model vs. Tinkertoy Approach; GI / ITG Workshop on Custom Computing, Dagstuhl, Germany, 19-21 June 1996    <PDF>  
  411. (b) (invited paper): High-Performance Computing": über Szenen und Krisen; GI / ITG Worksh on Custom Computing, Schloß Dagstuhl, Wadern, Germany, 19 - 21 June 1996   translation of title    <PDF>        
  412. (it) (Invited Tutorial, together with Jürgen Becker): Xputers and Their Programming Environment;  ARM Advanced RISC Machines, Ltd. Europe, Cambridge, UK, July 24, 1996.        
  413. (g) (w. J.Becker, M.Herz, et al.); A Synthesis System for Bus-based Wavefront Array Architectures; ASAP'96  Int'l Conference on Application-Specific Systems, Architectures and Processors, Chicago, Ill, USA, Aug 19-21, 1996 <PDF>  <pdf2>     
  414. (g) (w. J.Becker, et al.): Custom Computing Machines vs. Hardware/Software Co-Design: from a globalized Point of View; The 6th International Workshop on Field Programmable Logic and Applications (FPL'96); Darmstadt, Germany, September 23-25, 1996 <PDF>       
  415. (B) ( Book Editor w. M. Glesner): Field-Programmable Logic; Lecture Notes in Computer Science, Springer-Verlag Berlin/Heidelberg/New York, 1996.        <the conference>             <Reiner's books>
  416. (p) Der neue Treibstoff für Wohlstand und Arbeit ist Wissen; WELT am SONNTAG, 5. 5. 96  translation of the title        <der text>      <Reiner Hartenstein's Pressespiegel>
  417. (p) Schlagkräftige Innovations-Truppen entscheiden den Wettstreit der Nationen; WELT am SONNTAG, 12. 5. 1996     - translation of title < der text >    < Presse-Echo >
  418. (p) Die Wettbewerbsfähigkeit muß oberstes Ziel unseres Bildungswesens sein; WELT am SONNTAG, 19. 5. 1996     - translation of title < der text >    < Presse-Echo >
  419. (b) (w. J. Becker, M. Herz, et al.): Co-Design and High Performance Computing: Scenes and Crisis; Proc. Reconfigurable Technology for Rapid Product Development & Computing - Part of SPIE's Int'l Symposium VOICE, VIDEO and DATA COMMUNICATIONS, PHOTONICS EAST, Boston, USA, Nov 1996   <PDF>   
  420. (bj) (w. J. Becker, et al.): A Novel Machine Paradigm to Accelerate Scientific Computing; Computer Science and Informatics Journal: Special issue on Scientific Computing, Computer Society of India, 1996 <pdf> <pdf-2>    
  421. (g) (w. J. Becker, et al.): An Embedded Accelerator for Real Time Image Processing; 8th EUROMICRO Workshop on Real Time Systems, L'Aquila, Italy, June 1996    <PDF>       
  422. (p)  "Wirre Statistik der arbeitslosen Informatiker"; DIE WELT 12. 7. 1996   < der text >      <Pressespiegel>
  423. (N) SYS3: Mapping Systolic Arrays onto Xputers; DRAFT book chapter; July 1996     <PDF>    
  424. (N) Application Areas for Xputers; DRAFT book chapter; July 1996     <PDF>
  425. (g) (w. J.Becker, M.Herz, U.Nageldinger): A General Approach in System Design Integrating Reconfigurable Accelerators;    Proceedings of the IEEE 1966 International Conference on Innovative Systems in Silicon (ISIS); Austin, Texas, USA, October 1996     <PDF>                    
  426. (g) (w. J. Becker): Hardware/Software Co-Design for data-driven Xputer-based Accelerators; Proceedings of the 10th International Conference on VLSI Design (Theme: VLSI in Multimedia Applications), January 4-7, 1997, Hyderabad, India  <award>   <Xputer Software 1997>  <pdf>       
  427. (g) (w. J. Becker): A Two-level Co-Design Framework for data-driven Xputer-based Accelerators; Proceedings 30th Hawaii International Conference on System Sciences (HICSS-30), January 7 - 10, 1997, Wailea, Maui, Hawaii, USA,   <Presse-Echo>    <inforapid>   <freenet>  <pdf>     
  428. (g) (w. J. Becker): Performance Analysis in CoDe-X Partitioning for Structural Programmable Accelerators; The 5th International Workshop on Hardware/Software Co-Design (CODES/CASHE'97), Braunschweig, Germany, March 24 - 26, 1997       <PDF>              
  429. (g) (w. J. Becker, K. Schmidt): Performance Evaluation in Xputer-based Accelerators; Proceedings of the 4th Reconfigurable Architectures Workshop (RAW-97), in conjunction with the 11th International Parallel Processing Symposium, IPPS'97, Geneva, Switzerland, April 1-5,1997    <PDF>   <RC 1997-2000>      RAW conference series  
  430. (i) (Presse-Echo: Dr. Klaus Schlüter, DOS Magazin:) Xputer - Weltwunder aus Kaiserslautern; DOS Magazin, Mai 1997 <pdf>    
  431. (g) (w. J. Becker, M. Herz, Th. Hoffmann, U. Nageldinger): A Support Environment for High Tech Products; in: Klaus Buchenrieder, Alexander Sedlmeier (editors): Proc. Int'l Workshop on Conjoint Systems Engineering (CONSYSE'97), September 1997, Bad Tölz, Germany  <PDF>        
  432. (k) (workshop opening keynote ) How to Survive a Possible New Design Crisis; to appear in Proceedings of the IFIP WG10.1 & 10.7 Workshop, Univ. of Sterling, UK, July 2-4, 1997 <keynotes>
  433. (g) (w. J. Becker, M. Herz, U. Nageldinger): A Novel Sequencer Hardware for Application Specific Computing; Proceedings of the 11th International Conference on Application-specific Systems, Architectures and Processors, (ASAP`97), Zurich, Switzerland, July 14-16, 1997 <PDF>  <pdf2>       
  434. (g) (w. J. Becker, M. Herz, U. Nageldinger): An Embedded Accelerator for Real World Computing; IFIP Int'l Conf. on Very Large Scale Integration, VLSI`97, Gramado, Brazil, August 26-29, 1997  <PDF>  <pdf2>    
  435. (g) (w. R. Kress, U. Nageldinger): An Operating System for Custom Computing Machines based on the Xputer Paradigm;        The 7th International Workshop on Field Programmable Logic (FPL`97), London, UK, September 1-3, 1997         <PDF>                              
  436. (g) (with. J. Becker, M. Herz, U. Nageldinger): Data Scheduling in Hardware/Software Co-Design for Field-programmable Accelerators; 7th Int'l Workshop FPL`97, London, UK, Sep 1-3, 1997 <PDF>     <pdf2>    
  437. (B) ( Book editor) Reiner Hartenstein, Viktor Prasanna (ed): Reconfigurable Architectures: High Performance by Configware; ITpress Verlag, 1998, ISBN 3-929814-10-2                 <the conference>      <IPPS97>       <RC 1997-2000>              <Reiner's books>
  438. (g) (w. J. Becker, M. Herz, U. Nageldinger): An Innovative Reconfigurable Platform for Embedded System Design; Proceedings of the Workshop Zielarchitekturen Eingebetteter Systeme, ZES`97, in conj. w. Fachtagung Architekturen von Rechensystemen ARCS'97, Rostock, Germany, Sep 11, 1997 <PDF>    <pdf2>   
  439. (g) (with. J. Becker, M. Herz, U. Nageldinger): A Novel Universal Sequencer Hardware; Proceedings of Fachtagung Architekturen von Rechensystemen ARCS'97, Rostock, Germany, September 8-11, 1997 <PDF> 
  440. invited paper: The Microprocessor is no more General Purpose: why Future Reconfigurable Platforms will win; International Conf. on Innovative Systems in Silicon (ISIS 1997), Austin TX, USA, Oct 8-10, 1997   interim Best Paper Award: Honorable Mention   <award>  <PDF>  <pdf2>         
  441. (kj) W. Mangione-Smith, B. Hutchings, D. Andrews, A. DeHon, C. Ebeling, R. Hartenstein, O. Mencer, J. Morris, K. Palem, V. Prasanna, H. Spaanenburg: Seeking Solutions in Configurable Computing;   IEEE Computer, 30/12, December 1997  <PDF>  <pdf>                          
  442.      Using the wrong browser? This paragraph should have the number 442
  443. (k) (invited conference track organization) Introduction to the Configware Minitrack - Hardware and Software come closer (session chair): "Configware: Dynamic Redefinition of Hardware/Software Boundary");The 31st Hawaii Int'l Conf. on Systems Sciences (HICSS HICSS-31), January 1998, Kohala Coast, Big Island, Hawaii, USA 
  444. (gj) Automatic Parallelism Exploitation for FPL-Based Accelerators; Proc. 31st Hawaii International Conference on Systems Sciences (HICSS HICSS-31), January 1998, Kohala Coast, Big Island, Hawaii, USA
  445. (gj) (w. J. Becker, K. Schmidt): Solving Satisfiability Problems Using Logic Synthesis and Reconfigurable Hardware; The 31st Hawaii Int'l Conf. Systems Sciences (HICSS HICSS-31), January 1998, Big Island, Hawaii, USA
  446. (g)  (with Jürgen Becker,  Michael Herz, Ulrich Nageldinger): Parallelization in  Co-Compilation for Configurable Accelerators; in Proccedings of the Asia and South Pacific Design Automation Conference, ASP-DAC’98, Yokohama, Japan, February 10 - 13, 1998       <PDF>     <pdf2>                   
  447. (k) (invited presentation at internal company meeting) Reconfigurable Computing: From Tinkertoy to Fundamental Computing Paradigm; NEC Laboratories, Princeton, New Jersey, March 1998
  448. (g) (w. M. Herz, Th. Hoffmann, U. Nageldinger):  On Reconfigurable Co-Processing Units; Proc. Reconfigurable Architectures Workshop (RAW98), held in conj. w. 12th Int'l Parallel Processing Symposium (IPPS-98) and 9th Symp. on Parallel and Distributed Processing (SPDP-98), Orlando, Florida, USA,  March 30, 1998;  Proc.: Jose Rolim (Ed.): Parallel and Distributed Processing, LNCS 1388, Springer-Verlag, Germany, 1998   <pdf>       RAW conference series  
  449. (k) ( conference opening keynote): Rapid prototyping of embedded hardware/software systems; Int'l Workshop on Rapid Prototyping, Leuven, Belgium, 3-5 June '98
  450. (g) (w. M. Herz, F. Gilbert): Designing for Xilinx XC6200 FPGAs;  The 8th International Workshop on Field-Programmable Logic and Applications (FPL’98), Tallinn, Estonia, Aug 31- Sep 3, 1998. Proceedings editors: R.. Hartenstein, A. Keevallik (Ed.), LNCS 1482, Springer-Verlag, Germany, 1998   <pdf>         
  451. (B) ( Book Editor, w.  A, Keevallik): Field-Programmable Logic and Applications: From FPGAs to Computing Paradigm - 8th International Workshop FPL'98, Tallinn, Estonia, August 31 - September 3, 1998"; LNCS No. 1482, Springer-Verlag Berlin/Heidelberg, 1998 - ISBN 3-540-64948-4          <Reiner's books>
  452. (g) (w. M. Herz, Th. Hoffmann, U. Nageldinger): Exploiting  Contemporary Techniques in Reconfigurable Accelerators; Proc.  8th International  Workshop on Field-Programmable Logic and Applications (FPL’98) , Tallinn, Estonia, August 31-  September 3, 1998.   Proceedings: Reiner W. Hartenstein, Andres Keevallik (Ed.), Lecture Notes in Computer Science  1482, Springer-Verlag, Germany, 1998   <pdf>     
  453. (k) (invited presentation at an internal company meeting) The KressArray: a Survey on Progress and Applications; Siemens AG, Corporate Research, Munich, Germany, October 1998     
  454. (b) (with Michael Herz, Thomas Hoffmann, Ulrich Nageldinger): Using the  KressArray for Configurable Computing; Proceedings of SPIE Vol. 3526, Conference on  Configurable Computing: Technology and Applications, Boston, USA, Nov 2-3, 1998  <pdf>          
  455. (w) Xputer Pages; newsletter, Informatik dept., TU Kaiserslautern, 1999  <html> 
  456. (w) The Xputer Page; newsletter, Informatik dept., TU Kaiserslautern, 1999  <html> 
  457. (w) The Wrong Roadmap Page; newsletter, Informatik dept., TU Kaiserslautern, 1999  <html> 
  458. (w) The Anti-Machine Page; newsletter, Informatik dept., TU Kaiserslautern, 1999  <html> 
  459. (w) The Configware Page; newsletter, Informatik dept., TU Kaiserslautern, 1999  <html> 
  460. (w) The Morphware Page; newsletter, Informatik dept., TU Kaiserslautern, 1999  <html> 
  461. (w) The Flowware Page; newsletter, Informatik dept., TU Kaiserslautern, 1999  <html> 
  462. (w) The Data Streams Page; newsletter, Informatik dept., TU Kaiserslautern, 1999  <html> 
  463. (w) The Kress Array Page; newsletter, Informatik dept., TU Kaiserslautern, 1999  <html> 
  464. (w) The Xputers Page (in German language), newsletter, Informatik dept., TU Kaiserslautern, 1999  <html> 
  465. (w) The auto-sequencing Memory (asM) Page; newsletter, Informatik, TU Kaiserslautern, 1999  <html> 
  466. (w) The Generic Address Generator (GAG) Page; newsl., Informatik, TU Kaiserslautern, 1999  <html> 
  467. (w) The Reinvent Computing Page; newsletter, Informatik dept., TU Kaiserslautern, 1999  <html> 
  468. (g) (w. M. Herz, Th. Hoffmann, U. Nageldinger, Ch. Schreiber): Interfacing the MoM-PDA to an Internet-based Development System; The 32th Anual Hawaii Int. Conf. on System Science (HICSS, HICSS-32), January 1999, Wailea, Maui, Hawaii, USA, 1999  <PDF>  <the project>  <desciption>  <crew>   
  469.  (g) (with Michael Herz, Thomas Hoffmann, Ulrich Nageldinger, Christian Schreiber): XMDS: The Xputer Multimedia Development System; The 32th Anual Hawaii Int. Conf. on System Science  (HICSS, HICSS-32), January 1999, Wailea, Maui, Hawaii, USA, 1999  <PDF>    <inforapid>   <freenet>   
  470. (k) (invited conference track organization) R.W. Hartenstein, V. Milutinovic: Introduction to the configware minitrack - Configware: from glue logic synthesis to reconfigurable computing systems; The 32nd Hawaii International Conference on Systems Scoiences   (HICSS, HICSS-32), January 1999, Wailea, Maui, Hawaii, USA
  471. (k) (invited presentation at internal company meeting) A Framework for Optimization and Programming of application-domain-specific KressArray Architectures; ST microelectronics Corporation, Agrate Brianza, Italy, February 17, 1999
  472. (invited presentation at internal company meeting): The KressArray Design Space Explorer; MorphICs Inc., Cupertino, CA, USA, Apr 23, 1999    
  473. (k) (invited presentation at internal company meeting) Reconfigurable Computing Development -- Trends; Dot Wireless Inc., San Diego, CA, USA, 1999   <pdf>
  474. (k) (keynote address): Reconfigurable Computing: Taking off to Overcome the Microprocessor; PARC Forum, Xerox Palo Alto Research Center, May 13, 1999  <microprogramming-vs-reconfigurable>     <the event>   <keynotes>   <George E. Pake Auditorium>
  475. (g) (with  M. Herz, T. Hoffmann, U. Nageldinger): Mapping Applications onto  reconfigurable KressArrays; The 9th International Workshop on Field Programmable Logic and  Applications (FPL'99), Glasgow, UK, August 30 - September 2, 1999      <pdf>                                
  476. (g) (together w. M.Herz, T.Hoffmann, U.Nageldinger): An Internet Based Development Framework for Reconfigurable Computing; The 9th International Workshop on Field-Programmable Logic and Applications (FPL '99), Glasgow, UK, August 30 - September 2, 1999   <pdf2>  
  477. (t) (R. Kress): rALU Architectures for the Xputer Prototype MoM-3; November 1999   <pdf>    
  478. (B)  14. ( Book Editor , w.  Patrick Lysaght, James Irvine): Field-Programmable Logic and Applications: the 9th Interenational Workshop (FPL'99), Glasgow, UK, Aug/Sep 1999; LNCS No. 1673, Springer-Verlag Berlin/Heidelberg, 1999 - ISSN 0302-9743      <the conference>         <Reiner's books>           <AWARD>
  479. (k) (invited talk ) (m. Prof. Dr. Josef Schmid): Erfordernisse der Wissensgesellschaft; Kamingespräch, Jahres-tagung der Studienges. f. Mittelstandsfragen, Innzell, 16-18.Okt'98; in: (Hrsg.) R. Strohmeier: Bilanz d. Mittelstands-politik, Wirtschaftswissenschaftliches Kolloquium, München 1999, ISBN 3-9803799-4-9   - translation of title -
  480. (g) (w. M. Herz, Th. Hoffmann, U. Nageldinger): KressArray Xplorer: A New CAD Environment to Optimize Reconfigurable Datapath Array Architectures; The 5th Asia and South  Pacific Design Automation Conf. ASP-DAC 2000, Pacifico Yokohama, Yokohama,  Japan, Jan 25-28, 2000.   .  <PDF>   <KXplorer>        
  481. (g) (with M. Herz, T. Hoffmann, U. Nageldinger): Synthesis and Domain-specific Optimization of KressArray-based Reconfigurable Computing Engines; 8th ACM International Symposium on Field-Programmable Gate Arrays (FPGA 2000), Monterey, CA, USA, Feb. 9-11, 2000  <PDF>  <RC 1997-2000>  <pdf2>     
  482. (k)  (invited talk Makimoto's Wave, the 2nd Design Crisis, and the Future of Reconfigurable Computing; Dagstuhl Seminar No. 00261, June 25 - 30, 2000                        <PDF> 
  483. (g)  (with M.Herz, T.Hoffmann, U.Nageldinger):  Generation of Design Suggestions for Coarse-Grain Reconfigurable Architectures; Proc. Field-Programmable Logic  and Applications (FPL2000), Villach, Austria, August 2000; Springer-Verlag Berlin/Heidelberg, 2000  <PDF>  <RC 1997-2000>          <press_en>   <press_de> 
  484. (kj)  (invited talk  -  eingeladener Beitrag): Der Mikroprozessor im nächsten Jahrtausend;  Elektronik 49, 1; 11. Januar 2000  - translation of title  <PDF>
  485. (B)  ( Book editor w. H. Grünbacher): Field-Programmable Logic  and Applications - The Roadmap to Reconfigurable Computing; Lecture Notes in Computer Science (LNCS No. 1896), Springer-Verlag, 2000,    <the conference>  <award>  <press_en>  <press_de>       <Reiner's books>   
  486. (i): Weiche Hardware; Radio Interview d. Klaus Herbst, Anmoderation: Dr. Markus Bohn: In der Computerbranche herrscht wieder einmal Goldgräberstimmung. SWR-2-Sendung “Campus”, 2. Sep 2000
  487. (g)  (with Th. Hoffmann, U. Nageldinger): Design-Space Exploration of Low Power Coarse Grained Reconfigurable Datapath Array Architectures;  Proc. PATMOS 2000,  International Workshop - Power and Timing Modeling, Optimization and Simulation, Göttingen, Germany - September 13-15, 2000    <PDF>     
  488. (w) The Xputer Lab: CSG homepage, Fachbereich Informatik, TU Kaiserslautern, Sept. 2000
  489. (ip) ( several invited presentations): Reconfigurable Circuits and their Applications; DaimlerChrysler internal FPGA-Workshop; Schwaebisch Hall; Germany, Sept. 26 - 28, 2000
  490.      Using the wrong browser? This paragraph should have the number 490
  491. (k) (invited embedded tutorial):  Coarse Grain Reconfigurable Architectures; Asian and South Pacific Design Automation Conference 2001 (ASP-DAC'01), Yokohama, Japan, Jan 30 - Feb. 2, 2001 <PDF>  <ppt>     
  492. (g) (embedded tutorial): A Decade of Research on Reconfigurable Architectures - a Visionary Retrospective; Int'l Conf. on Design Automation and Testing in Europe 2001 (DATE 2001), Exhibit and Congress Center, Munich, March 2001 - Cite U Like -   <PDF>   <PDF> also see  <PPT> and: Christophe Bobda     
  493. (k) (keynote address given as the Laureate Guest of this Conference ): Programmierung Reconfigurierbarer Schaltungen: nur Logik-Synthese auf einer seltsamen Nischen-Plattform ?   The 10th E.I.S. Workshop, Dresden, Germany, April. 3 - 5, 2001  <PDF>   
  494. (k) ( keynote address ): Reconfigurable Computing: a New Business Model and its Impact on SoC Design; DSD'2001 - EUROMICRO Symp. on  Digital Systems Design, Warzaw, Poland, Sep 2001  <PDF>   
  495. (k) (invited paper) "Reconfigurable Computing: the Roadmap to a New Business Model - and its Impact on SoC Design"; SBCCI 2001 - the 15th International Symposium on Integrated Circuits  and Systems Design, Brasilia, DF, Brazil, 10-15 Sep 2001  <PDF>            
  496. (k) (conference opening keynote address): Reconfigurable Computing - Architectures and Methodologies for System-on-Chip; SoC technology seminar "Enabling Technologies for System-on-Chip Development";  Tampere, Finland,  November 19-20, 2001   <pdf>   <ppt>      
  497. (k) (invited after conference tutorial)   Reconfigurable Computing: Architectures and Methodologies for System-on-Chip; Tampere, Finland,  Nov. 21, 2001   <pdf-1> <pdf-2> <pdf-3> <pdf-4> <pdf-0> <ppt-0>

  498. (k) ( keynote  address ): Configware/Software Co-Design: Be Prepared For the Next Revolution!  the 5th IEEE Workshop on Design & Diagnosis of Electronic Circuits &Systems (DDECS'02), Brno, Czech Republic, April 17-19, 2002   <pdf>   
  499. (k) (invited keynote address): Stream-based Computing - Antimatter of Informatics; The 1st Int'l Conf. on Intelligent Computing and Information Systems (ICICIS 2002), Cairo, Egypt, June 24-26, 2002. <keynotes> <pdf>            
  500. (k) ( several invited courses): Reconfigurable Computing; internal workshop at ENST<x>,  Paris, July 8 - 18, 2002, supported by CNRS  <x>     <pdf-1>     <pdf-2>     <pdf-3>     <pdf-4>
  501. (k) (invited presentation): Stream-based Computing: Antimaterie der Informatik; 60th semester anniversary workshop, Univ. Dortmund, July 18-19, 2002       <pdf>
  502. (g) (w. M. Ayala-Rincón, R. Maya Neto, R. P. Jacobi, C. Llanos): Applying ELAN Strategies in Simulating Processors over Simple Architectures; 2nd Int. Worksh. on Reduction Strategies in Rewriting and Programming WRS'02,  Copenhagen, Denmark, July 21, 2002 ppt  ps  <pdf> <EDA by TRS>  <TR>  Bibliotheka-Universa  meet genius  Term ReWriting                 Mauricio: PhD from Kaiserslautern:            
  503. (gj) (w.: M. Ayala-Rincón, R. Maya Neto,  R. P. Jacobi, C. Llanos): Applying ELAN Strategies in Simulation Processors over Simple Architectures; (reprint from 2nd int'l Workshop on Reduction Strategies in Rewriting and Programming (WRS 2002); Copenhagen, Denmark, July 21, 2002) Electronic Notes in Theoretical Computer Science (ENTCS) 70/6; Elsevier Science Publishers     <KARL TRS>      Bibliotheka-Universa  meet genius  Term ReWriting                  Mauricio: PhD from Kaiserslautern:            
  504. (k) (keynote address ): Reconfigurable Computing: urging a revision of basic CS curricula; Workshop on Logic and Synthesis  for Programmable Devices  WLSPD2002; Las Vegas, USA, Aug 6-8, 2002  <pdf>  <pdf2>  <abstr>
  505. (k) ( keynote address): Disruptive Trends by Custom Compute Engines;   12th Int'l Conf. on Field Programmable Logic and Application FPL 2002, Sep 2-4, 2002,  La Grande-Motte (Montpellier, France)    <pdf>
  506. (k) (invited paper ): Trends in Reconfigurable Logic and Reconfigurable Computing; ; 9th IEEE Int'l Conf. on Electronics, Circuits and Systems - ICECS 2002,  Sep 15-18, 2002, Dubrovnik, Croatia   <pdf> 
  507. (k) (invited paper ) (w. Michael Herz, Miguel Miranda, Erik Brockmeyer, Francky Catthoor): Memory Addressing Organisation for Stream-based Reconfigurable Computing; 9th IEEE International Conference on Electronics, Circuits and Systems - ICECS 2002,  September 15-18, 2002, Dubrovnik, Croatia <pdf>       
  508. (k) (panelist contribution):  Panel on Embedded Architectures: Configurable, Reconfigurable, or what?  (panelists: Pierre Paulin, STMicro (moderator), Henk Corporaal, IMEC, Reiner Hartenstein, Univ. Kaiserslautern,  Oz Levia, Improv Systems,  Marco Pavesi, Italtel, Chris Rowen, Tensilica.);  CASES 2002 (International Conference on Compilers, Architecture, and Syntheses for Embedded Systems), October 8-11, 2002, Grenoble, France, co-located with EMSOFT 2002 (Oct 7-9) --  <ppt>  <pdf> 
  509. (ic)  (handout and presentation of an invited 3 day Course): Reconfigurable Systems; November 13, 14, 21, 2002, CS Department, University of Brasilia, Brasil.   
  510. (m) Generalization of the Systolic Array; memo, 2002    <pdf>      
  511. (k) (invited presentation) Data-stream-based Computing, Enabling Technology for Reconfigurable Computing; Seminar Prof. José Camargo da Costa, 22 Nov 2002, ENE UnB, Brasilia, DF, Brasil   <pdf>  <KARL TRS> 
  512. (s) (together with M. Ayala-Rincón, R. P. Jacobi, C. Llanos): Designing Arithmetic Digital Circuits via Rewriting-Logic,  < ps>  <pdf>  <EDA by TRS example>    Bibliotheka-Universa   Bibliotheka-Universa  meet genius  Term ReWriting                    Mauricio: PhD from Kaiserslautern:            
  513. (s) (w.:  M. Ayala-Rincón, R. Maya Neto, R. P. Jacobi, C. Llanos: Architectural Specification and Simulation Through Rewriting-Logic; Journal: Revista Colombiana De Computacion (Colombian Journal of Computation) - RCC , vol. 3, no. 2, 2002   <ps> <pdf>  <KARL TRS>      Bibliotheka-Universa  Bibliotheka-Universa  meet genius  Term ReWriting                  Mauricio: PhD from Kaiserslautern:            
  514. (s) (w. M. Ayala-Rincón, R. P. Jacobi, C. Llanos): Systolic Arrays as Simple Reconfigurable Architectures for Computing Algebraic Operations via Rewriting-Logic,    <pdf>
  515. (k) (invited presentation): Toward scalability for success of a configware industry; Expert Meeting on PLD Architectures and Design Environments, 27 Feb 2003, Braunschweig, Germany  <pdf>     
  516. (s) (w. J. Becker):   Invited Paper: Configware and Morphware going Mainstream; J. Syst. Architecture 2003 <pdf> <pdf2>  
  517. (k) (keynote address); Data-Stream-based Computing and Morphware; Joint 33rd Speedup and 19th PARS Workshop (Speedup / PARS 2003), Basel, Switzerland, March 2003  <ppt>  <pdf>    <pdf2>     
  518. (ic) (invited company-internal tutorial presentations): Morphware in Automotive Electronics; DaimlerChrysler AG, March 2003, Esslingen, Germany 
  519. (k) (keynote address): Are we really ready for the Breakthrough?; The 10th Reconfigurable Architectures Workshop, 2003 (RAW 2003), Nice, France, April 22, 2003  <keynotes>  <pdf>  <abstr>  <pdf2> RAW conference series
  520. (k) (keynote address): Datastream-based Reconfigurable Computing; Dresdner Arbeitstagung Schaltungs- und Systementwurf  (DASS'2003) / Workshop System Design Automation (SDA'2005), 8-9 May 2003 Dresden, <pdf>
  521. (invited presentation): Reconfigurable Computing and its Impact; Intel Reconfigurable Computing and Communications Workshop, intel Corp., Hillsboro OR, USA. May 15-16, 2003  <presentation>
  522.  (k)  (keynote address): A Mead-&-Conway-like Break-through is overdue; Dagstuhl Seminar on Dynamically Reconfigurable Architectures; Dagstuhl, Germany, 20-25 July 2003, <pdf> <panel about this talk>  
  523. (s) (w M. Ayala-Rincón, R. P. Jacobi, C. Llanos): Modeling Reconfigurable Systolic Arrays for Computing Algebraic Operations via Rewriting-Logic; Dagstuhl Seminar Nº 03301, July 20-25, 2003  Dagstuhl, Germany  <pdf>  <pdf-2>   <EDA by TRS example>    Bibliotheka-Universa  meet genius  Term ReWriting                              Mauricio: PhD from Kaiserslautern:                       
  524. (ic) (handout and presentation of an invited full day Course):  Reconfigurable Computing and its Impact on SoC and beyond; REASON Summer School on FPGA-based and Reconfigurable Systems, Univ. of Ljubljana, 11-15 Aug 2003, Ljubljana, Slovenia  <introduction: pdf> 
  525. (ic) (invited course: 3 tutorials) part 1: Reconfigurable Computing and its Compilation Techiques; part 2 and 3: Distributed Memorry and Datastream-based Reconfigurable Computing; Swedish INTELECT Summer School on Multiprocessor Systems on Chip, 25-27 Aug 2003, Örebro, Sweden <pdf-2> <pdf-3>   
  526. (g) (w. M. Ayala-Rincón, R. Nogueira, R. Jacobi, C. Llanos): Modeling a Reconfigurable System for Computing the FFT in Place via Rewriting-Logic; (<pdf> ). To appear in IEEE CS Press; Proceedings ot the 16th Symposium on Integrated Circuits and System Design "CHIP IN SAMPA" - (SBCCI 03), September 8-11, 2003, São Paulo, Brasil,   Term ReWriting                   Mauricio: PhD from Kaiserslautern:            
  527. (ic) (invited company-internal tutorial presentations): Reconfigurable Computing and its Enabling Technologies -- for the Personal Supercomputer (PS) to replace the PC; THALES internal workshop; 18 Sep 2003, Palaiseau, France      <award> 
  528. (g) (w.  R. P. Jacobi, M. Ayala-Rincón, C. Llanos): Using Rewriting-Logic Notation for Funcional Verification in Data-Stream Based Reconfigurable Computing;   Forum on Specification and Design Languages - FDL 03, Frankfurt, Germany, (Sep 23-26, 2003).  <pdf>  <pdf>      Term ReWriting        
  529. (g) (w. Mauricio Ayala-Rincón, Rinaldi Maya Neto, Ricardo P. Jacobi, Carlos H. Llanos): Architectural Specification, Exploration and Simulation Through Rewriting-Logic,   <ps>  <pdf>   The Colombian Journal of Computation, Vol. 3(2): 20-34, 2003     Term ReWriting   Term ReWriting           Mauricio: PhD from Kaiserslautern:            
  530. (i) (radio interview) R. Hartenstein, (interviewt durch Klaus Herbst): Weiche Hardware: ''Quicksilver'' macht Silizium gefügig; 23. August. 2003, Deutschlandfunk;  . (mirror)
  531. (kj)  Reconfigurable Computing:  Paradigmen-Wechsel erschüttern die Fundamente der Informatik; Prof. Glesner's 60th Birthday Anniversary Colloquium; 29 Aug 2003, Darmstadt, Germany  <pdf>  Term ReWriting  <pdf-in-english>
  532. (gj) (w. J. Becker):  Invited Paper: Configware and Morphware going Mainstream;  Journal of Systems Architecture vol.  Volume 49 ,  Issue 4-6  (September 2003), pp. 127-142, 2003. <pdf>         
  533. N. N.: Xputer Lab's H/S Co-Design Page   
  534. (k): Data-Stream-Based Computing: Models and Architectural Resources; International Conference on Microelectronics, Devices and Materials (MIDEM 2003), Ptuj, Slovenia, Oct.1-3, 2003   <pdf>    
  535. (m) Generalization of the Systolic Array; report, October 2003, CSG, Fachbereich Informatik, Technical University of Kaiserslautern, Germany  <pdf>                               
  536. (s,g) Mauricio Ayala-Rincón, Rodrigo B. Nogueira, Carlos H. Llanos, Ricardo P. Jacobi, Reiner W. Hartenstein: Efficient Computation of Algebraic Operations over Dynamically Reconfigurable Systems Specified by Rewriting-Logic Environments; 23rd International Conference of the Chilean Computer Science Society (SCCC 2003), 6-7 Nov 2003, Chillan, Chile.   <pdf>          Mauricio: PhD from Kaiserslautern:            
  537. (ip) CS curricula update proposed: by adding Reconfigurable Computing; EAB board of directors meeting IEEE Computer Society, 1 Nov 2003, Philadelphia, PA, USA  <pdf>    ¦¦¦¦¦¦¦¦¦¦¦
  538. (r) (invited presentation) Morphware: neue Perspektiven für eingebettete Systeme; Workshop Selbstoptimierung und Adaption; Paderborn, Germany, Nov 24-25, 2003 <pdf>   <award>   - translation of title - 
  539.      Using the wrong browser? This paragraph should have the number 539
  540. (m) (memorandum) R. Hartenstein: Automotive Electronics heading toward a Crisis? TU-KL, 2004 <pdf>  
  541. (k) (keynote address) The Impact of Morphware on Parallel Computing; 12th Euromicro Conference on Parallel, Distributed and Network based Processing (PDP 2004), (x)  11-13 Feb 2004, A Coruña, Spain <pdf>
  542. (k) (keynote addressSoftware or Configware? About the Digital Divide of Parallel Computing; The 18th Int'l Parallel and Distributed Processing Symp. (IPDPS), April 26–30, 2004, Santa Fe, USA  <pdf-xl>   <pdf>   <ppt>
  543. (k) (keynote address) The Digital Divide of Computing; Proc. 2004 ACM International Conference on Computing Frontiers (CF04); April, 14-18, 2004. Ischia, Italy,  ACM Digital Library    <keynotes>  <pdf>    <pdf2>       
  544. (r) (invited full day course): Reconfigurable HPC; Technical University of Talinn (TTU); May 7, 2004, Tallinn, Estonia, (ppt part 1) (ppt part 2) (ppt part 3) (ppt part 4  <pdf-1>  <pdf-2>  <pdf-3>  <pdf-4>  <2> 
  545. (k) (keynote address) The Changing Role of Computer Architecture Education within CS-related Curricula; Computer Architecture Education Worksh (WCAE 2004) at ISCA 2004, 19 Jun 2004, Munich, Germany <pdf>
  546. (k) (keynote address - opening a new workshop series): Reconfigurable HPC: torpedoed by Deficits in Education ? Workshop on Reconfigurable Systems for HPC (RHPC); July 21, 2004, held in conjunction with HPC Asia 2004, 7th International Conference on High Performance Computing and Grid in Asia Pacific Region, Omiya Sonic City, Tokyo Area, Japan,  July 20 - 22, 2004 <keynotes>   <HPCAsia>  <RHPC>  <PDF>   <PDF2>   
  547. (k) (invited full day course) Reconfigurable Technologies; July 23, 2004 .Seminar given at Kyushu University at Fukuoka, Japan    <pdf-part 1>  <pdf-part 2>  <abstract>   <pdf3>  <download the presentaion>  <1>     
  548. (g) (w. M. Ayala-Rincón, R. Nogueira, R. Jacobi, W. C. Llanos): Modeling and Prototyping Dynamically Reconfigurable Systems; for Efficient Computation of Dynamic Programming Methods; ACM 17th Symposium on Integrated Circuits and System Design  SBCCI'04, Porto de Galinhas, Brazil, September 7 - 11, 2004,  <pdf>  Term ReWriting             Mauricio Ayala-Rincón: has the PhD from Kaiserslautern:            
  549. (g) (w. C. LLanos, R. Jacobi, M. Ayala-Rincón): A Dynamically Reconfigurable System for Space-Efficient Computation of the FFT; Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig'04), Colima, Mexico, September 20-21, 2004.    < ps>   <pdf>          Bibliotheka-Universa  meet genius  Term ReWriting        
  550. (g) (w. R. Jacobi, M. Ayala Rincon, L. Carvalho, C. Llanos): Reconfigurable Systems for Sequence Alignment and for General Dynamic Programming; 3rd Brasilian Worksh. on Bioinformatics (wob'04), Brasilia, Distrito Federal, Brazil, Oct 20-22, 2004     Bibliotheka-Universa  meet genius  Term ReWriting     Mauricio: PhD from Kaiserslautern:            
  551. (g) (w.:  M. Ayala-Rincón, R. Jacobi and C. Llanos): Designing Arithmetic Digital Circuits via Rewriting-Logic, (Postscript), 2004    <pdf>                     Mauricio: PhD from Kaiserslautern:            
  552. (k) (Keynote Address):  Supercomputing goes Reconfigurable: About key issues and their impact on CS education; The Winter  International Symposium on Information and Communication Technologies (WISICT),   January 3 - 6, 2005, Cape Town, South Africa <pdf>    
  553. (k) ( Keynote Address): Reconfigurable Computing (RC) being Mainstream: Torpedoed by Education; Int'l Conf. on Microelectronic Systems Education (MSE) conference, Anaheim, CA, USA, 12-13 June 2005, in conj. with DAC  (Design Automation Conference) Anaheim, California, USA, 13 - 17 June 2005     <keynotes>  <pdf>
  554. (ip) (invited presentation at an international company meeting): Reconfigurable High Performance Computing: the Next Disruptive Innovation; IBM Deutschland Entwicklung GmbH, 7 July 2005, Böblingen, Germany,  <pdf>                                    
  555. (s) (submitted) THE VON NEUMANN SYNDROME; SAMOS VI, Samos, Greece, July 2006 <pdf>  <pdf2> 
  556. (g) (w. C. Morra, J. Becker, M. Ayala-Rincon): FELIX: Using Rewriting-Logic for Generating Functionally Equivalent Implementations; 15th International Conference on Field-Programmable Logic and Applications, August 24 - 26, 2005, Tampere, Finland, Proc. FPL 2005    < pdf>  Cite seer  IEEE Xplore  MAUDE bibliography         Bibliotheka-Universa  Term ReWriting                 
  557. (bj) (w. Bernard Widrow and Robert Hecht-Nielsen):1917 Karl Steinbuch 2005;     <pdf>      <Steinbuch> 
  558. (n) (memo) Obsolete Curriculum Recommendations; August 2005    <pdf>
  559. (m) Ignorant Curriculum Recommendations; 2005     <pdf> 
  560. (n) (memo) Proposing a new Magazine; memorandum, September 2005   <pdf>   <pdf-1>  <pdf-2>
  561. (k) (Keynote Address): Programmable SoC progress stalled by unqualified programmers: CS curriculum upgrades enforceable or EE task force needed? New EXploratory Technology (NEXT) Conf., Oct 05, Salo, Finland  <abstr>  <pdf-2>
  562. (x) (panel statement) Flexibility and Low Power; a Contradiction in Terms? - Can Configurable or Re-Configurable Computing Offer Solutions? Int'l Symp. on Low Power Electronics and Design (ISLPED 2006), 4-6 Oct 2006, Rottach-Egern (Tegernsee), Germany <pdf>   
  563. (gj) (w. R. Jacobi, M. Ayala-Rincón, L. Carvalho, C. Llanos:) Reconfigurable systems for sequence alignment and for general dynamic programming;    The Journal on Genetics and Molecular Research (GMR), volume 2005    pdf        Bibliotheka-Universa  meet genius  Term ReWriting                 Mauricio: PhD from Kaiserslautern:            
  564. (k) (colloquium presentation - in German language) Reconfigurable Supercomputing: Hindernisse und Chancen 1-Dez-2005, University of Mannheim, Germany  <pdf>   <pdf2> 
  565. (r) KressArray: What is the achievement ? Generalization of the Systolic Array; TU-KL, 2005  pdf  Osti governement   
  566. (kj) (w. Bernard Widrow, Robert Hecht-Nielsen):  1917 Karl Steinbuch 2005; IEEE Computational Intelligence Society Magazine, 2006  <pdf>   --  more about Karl Steinbuch:  <german>   <english>   map your info
  567. (kj) (invited book chapter ) "Morphware and Configware"; in: A. Zomaya (editor): Handbook of Innovative Computing Paradigms; LNCS series, Springer Verlag Heidelberg/New York, 2006, <pdf>      reprinted in 2009 and 2010    also see Christophe Bobda
  568. (n)  Overdue CS, CE and ECE Curriculum Innovations, memorandum,  January 2006  - < pdf >
  569. (m) Speed-up Factors by Reconfigurable Computing; 2006      <pdf> 
  570. (m) Reconfigurable Computing Everywhere; 2006     <pdf> 
  571. (kj) Configware für Supercomputing: Aufbruch zum Personal Supercomputer; PIK - Praxis der Informationsverarbeitung und Kommunikation, 2006  < pdf >
  572. (k)  (workshop opening keynote) Why we need Reconfigurable Computing Education; 1st Int'l Workshop on Reconfigurable Computing Education (RCedu) March 1, 2006, Karlsruhe, Germany    <pdf>   <pdf-2>
  573. (m) Europe needs Reconfigurable Computing; 2006     <pdf> 
  574. (k)  (keynote address) From Organic Computing to Reconfigurable Computing; The 8th Workshop on Parallel Systems and Algorithms (PASA 2006), March 16, 2006, Frankfurt/Main, Germany  -  in connection ARCS 2006, March 13 - 16, 2006, Frankfurt/Main, Germany  -   <pdf>  |  <presentation>  |  <keynotes>  | <ppt>
  575. (g) Reconfigurable Supercomputing: What are the Problems? What are the Solutions?  Dagstuhl Seminar 06141 Dynamically Reconfigurable Architectures April 2 – 7, 2006             
  576. (k) (keynote address) New horizons of very high performance computing (VHPC) - hurdles and chances; 13th Reconfigurable Architectures Worksh. (RAW 2006), Rhodos, Greece, April 2006, <pdf>  <pdf2>  <SP>  <SF>  <panel>   early draft: "A Roadmap to New Horizons in High Performance Computing"; <pdf>  <pdf>    <pdf> RAW conference series
  577. (gj) (w.  M. Ayala-Rincón, C. H. Llanos, R. P. Jacobi): Prototyping Time and Space Efficient Computations of Algebraic Operations over Dynamically Reconfigurable Systems Modeled by Rewriting-Logic; TODAES ACM Trans. on Design Automation of Electronic Systems, 2006: 04/2006; 11(2) < pdf>  <PDF2>  ACM Digital Library ACM Digital Library  Google scholar  Microsoft scholar Authors  Microsoft scholar Title  Bibliotheka-Universa  meet genius  Term ReWriting            Mauricio: PhD from Kaiserslautern:                   <KARL TRS>
  578. (ki) (invited presentation ) Reconfigurable Computing; Meeting about Computing, IST Advisory Group (ISTAG) (x), EU, May 18, 2006, Brussels, Belgium   <pdf>
  579. (k)  (keynote ): The Transdisciplinary Responsibility of CS Curricula; The 8th World Conference on Integrated Design & Process Technology (IDPT), June 25-29, 2006, San Diego, CA, USA   <ppt>  <pdf>  <a>   <pdf2> 
  580. (k) Reconfigurable Supercomputing: Hurdles and Chances;   International Supercomputer Conference  (ICS 2006), June 28 - 30, 2006, Dresden, Germany, <ppt>  <pdf>  <pdf2>  abstract: <pdf>
  581. (k) (invited paper) The Pervasiveness of Reconfigurable Computing - The von Neumann Paradigm loosing its Dominance; 1st Int'l Workshop on Reconfigurable Computing Education (RCeducation), March 1, 2006, Karlsruhe,  Germany  <pdf>    see this paper !   <pdf-2> 
  582. (wi) Higher Performance by less CPUs; HPCwire, in conjunction with ISC 2006, Dresden, Germany, June 27 - 30, 2006   (HPCwire)    <PDF>  <PDF2>                                     
  583. (s) Implications of Makimoto's Wave; submitted, June 6, 2006   ( <pdf>)   
  584. (ai) Reconfigurable Supercomputing: Hurdles and Chances; International Supercomputer Conference  (ICS 2006), June 28 - 30, 2006, Dresden, Germany  (< abstract )  <pdf>
  585. (r) Generalization of the Systolic Array; memo, TU Kaiserslautern, 2006 <pdf>  <pdf>
  586. (g) (w. C. Morra, R. Sackmann, J. Becker): Using Rewriting Logic To Generate Different Implementations of Polynomial Approximations In Coarse-grained Architectures; Reconfigurable Communication-centric SoCs (ReCoSoc'06), July 3 - 5, 2006, Montpellier, France, <pdf>   Cite seer  Bibliotheka-Universa  Term ReWriting   
  587. (g) (w. C. Morra, M. Sackmann, S. Shukla, J. Becker): From Equation To VHDL: Using Rewriting Logic For Automated Function Generation; 16th International Conference on Field-Programmable Logic and Applications, August 28 - 30, 2006, Madrid, Spain, Proc. FPL 2006  <pdf>   <pdf>    Cite seer  Bibliotheka-Universa  Term ReWriting   
  588. (k) (simultanous two conferences opening keynote): The Re-definition of Low Power Design for HPC:  a Paradigm Shift; The 19th Symposium on Integrated Circuits and System Design (SBCCI 2006), co-located with the 21st Symposium on Microelectronic Technology and Devices (SBMICRO 2006), August 28 - September 1, 2006, Ouro Preto, MG, Brasil    <pdf>    <ppsx>    <abstract>
  589. (ki) (invited presentation): Reconfigurable Supercomputing heißt nicht nur:der Paradigmen-Kluft trotzen; ITIV Seminar on Information Processing Technologies, 1 Dec 2006, Karlsruhe, Germany  <pdf>

  590. (kj) (invited book chapter chapter 20) Basics of Reconfigurable Computing; in: J. Henkel, S. Parameswaran (editors): Embedded Computing -  A Low Power Perspective, Springer-Verlag, Heidelberg / New York, 2007 <pdf > .       also see Christophe Bobda    <pdf>     reprinted in  2010 
  591. (k) (keynote address) "Reconfigurable computing means to brave the paradigm chasm"; The HiPEAC Workshop on Reconfigurable Computing, Ghent, Belgium, January 28, 2007  <keynotes>  <pdf> <pdf2>
  592. (ai) Compilation Techniques promising to bridge the Software / Configware Chasm; The  Computer Engineering Colloquium, TU Delft, Holland, February 22, 2007 <SDPS> <pdf>
  593. (i) (guest editor:)   Introduction; Special Issue on Future Computer Systems: Reconfigurable Computing reinvents the Computing Discipline;   SDPS Journal, Transactions of the SDPS, 2007,   <pdf>
  594. (ai) Computing at the Crossroads: our Skills becoming Obsolete?  Colloquium, March 2007, International University at Bruchsal, Germany  <pdf>
  595. (k) (keynote addressReconfigurable Computing, Reconfigurable Supercomputing and Configware / Software Co-Compilation;  The 10th World Conference on Integrated Design and Process Technology; Antalya, Turkey, June 3 - 8, 2007 <prog>  <award>  <IDPT07>
  596. (gj) Reconfigurable Supercomputing - Aktuelles Schlagwort; abgelehnt v. GI Informatik-Spektrum, (pdf
  597. (k) (keynote panel organizer and chair) Transdisciplinary Science and Engineering Distinguished Keynote Panel; The 10th Biannial World Conference on INTEGRATED DESIGN & PROCESS TECHNOLOGY; Antalya, Turkey, June 1 - 7, 2007   <keynotes>  <award> 
  598. (k) (conference opening keynote) Reconfigurable Computing and the von Neumann syndrome; The 7th International Conference on Algorithms and Architectures for Parallel Processing ( ICA3PP ), Hangzhou, China, June 11-14, 2007 [x] <keynotes>  <pdf>  <pdf2>  <pdf-long>  von Neumann syndrome:       <Mendeley>         
  599. (kj) (invited paper, invited book chapter): The von Neumann Syndrome; Stamatis Vassiliadis Memorial Symp, Sep 28, 2007, Delft, Holland  <pdf>  <pdf2>  von Neumann syndrome:                  
  600. (k) (invited presentation): The Neumann Syndrome calls for a revolution; The 1st Int'l Workshop on High-Performance Reconfigurable Computing Technology and Applications (HPRCTA'07), i. conj. w. Supercomputing 2007 (SC07), Nov 2007, Reno, Nevada, USA,  von Neumann syndrome:          <Mendeley>          <presentation>
  601. (k) (invited presentation) HPC, SMEs and the price of oil; FET (Future and Emerging Technologies) Workshop on Massive ICT Systems (preparing call for funding in 2009-2010), Kommission of the European Union, Nov 27, 007, Brussels, Belgium   <presentation>                    
  602. (r)  invited Foreword; in: Christope Bobda: Introduction to Reconfigurable Computing: Architectures, Algorithms and Applications by Christophe Bobda (Hardcover - Aug 2007), Springer Verlag Heidelberg/New York, 2007   --   reprinted in 2009 and 2010  
  603.      Using the wrong browser? This paragraph should have the number 603
  604. (k) ( keynote address): The von Neumann Syndrome and the CS Education Dilemma; The 4th Int'l Worksh on Applied Reconfigurable Computing ( ARC 2008), March 2008, London, UK     <keynotes> <abstract> <pdf>               @

  605. (it) Why IEEE Computer Society must be the Trailblazer of Reconfigurable Computing (RC): An Important Strategic Issue (application to found a task force is on the way); IEEE Computer Society, TAB meeting, March 8, 2008, San Francisco, CA, USA <pdf>   

  606. (k) ( workshop opening keynote ) Reconfigurable Computing to solve the CS education dilemma; The 3rd Int'l Wksh. on Reconfigurable Computing Education (RC education), April 10, 2008, Montpellier, France <pdf>   

  607. (invited presentation) Programmierung jenseits des von-Neumann-Paradigma; 50-Jahrfeier des Institut für Technik der Informationsverarbeitung (ITIV), 20. Juni 2008,  KIT Karlsruhe, Germany  <presentation>

  608. (invited presentation): Informatik jenseits des von Neumann Paradigma;   Tag der Informatik, TU Dresden, 1. Juli 2008  <pdf>               @

  609. (memo) Speed-up Factors having been published <pdf> <more speed-ups>    
  610. (k) (keynote address) Von-Neumann-centric Computing: unaffordable soon ?; The 34th Euromicro SEAA Conference (SEAA 2008) - merged with the 11th EUROMICRO Conference on Digital System Design (DSD 2008), Sep 3-5, 2008, Parma, Italy <keynotes>    <summary>  <program table>  <presentation>
  611. (k)  (invited presentation) Speedups obtained by Reconfigurable Computing; September 19, 2008, Mechanical Engineering Department, Universidade de Brasilia, DF, Brasil  <pdf>
  612. (k)  (invited presentation at the President's Colloquium ) Our Computing Habits Unaffordable soon, and: a Climate Disaster; President's Colloquium,  25 Sep 2008, Univ. de Brasilia, DF, Brasil <pdf>
  613. (r)  EUROMICRO Conferences; ,  2009, Fachbereich Informatik, TU Kaiserslauterrn, Germany <pdf>
  614. (kch) (invited Foreword): Preface; in: N. Voros, A. Rosti, M. Hübner (Eds.): Dynamic System Reconfiguration in Heterogeneous Platforms - The MORPHEUS Approach; LNEE, Vol. 40, Springer Verlag Heidelberg, New York, June 2009      reprinted in 2010         
  615. (invited presentation ): Reconfigurable Computing, Feburary 2009, colloquium at Universidade de Brasilia, February 2009, Brasilia, DF, Brasil,  <presentation-part-1>   <presentation-part-2>
  616. (g) Massively Reducing Electricity Consumption and Greenhouse Gases by Innovative Compting Education; Int'l Sciencitic Congress on Climate Change; March   10-12, 2009, Copenhagen, Denmark  <pdf>
  617. (k) (keynote address): Rethinking Moore’s Law; 16th Reconfigurable Architectures Workshop (RAW 2009), May 25-26, 2009, Rome, Italy - in conjunction with the 23rd Int'l Parallell and Distributed Processing Symposium (IPDPS), May 25-29, 2009, Rome, Italy     <keynotes>     <summary>   <pdf>    <pdf2>    RAW conference series             @
  618.  ( invited in-depth presentation) Many-Core programming and the CS Education Dilemma - Rethinking Moore's Law; The 9th International Forum on Embedded MPSoC and Multicore; August 2-7, 2009, Savannah, Georgia, USA   <pdf>   <pdf-26>
  619. (k) ( conference opening keynote): The Impact of Reconfigurable Computing on Manycore Programming Trends; FPGAworld 2009, Sep 10, 2009, Stockholm, Sweden  <keynotes>  <pdf>  <presentation> <pdf2>   @
  620. (invited colloquium presentation): Programmer Education for the Multicore Era: the Twin-paradigm approach; School of ICT, KTH - Royal Inst. of Technology, Sep 11,  2009, Stockholm, Sweden  <pdf>  <ppt>
  621. Reprint in 2009: click here
  622. (k) The Expensive von Neumann Paradigm: is its Predominance still Tolerable?   <pdf>  
  623. (m) (not submited) Kopernikus and Software Engineering; The 2009 Int'l Conf. on Field-Programmable Technology (FPT'09); Sydney, Australia 9-11 December 2009 <abstract> <pdf-1> <pdf-2>  <pdf-3>  
  624. reprint in 2009: click here
  625. (m) Klimapolitik mit mehr Hirn: Der Stromverbrauch von Computern als Politikum; Bericht über einen Vortrag am 25. 9. 2008 in Brasilia; Kaiserslautern/Karlsruhe 2009; <pdf>
  626. (ip) (invited presentation) Twin-Paradigm Programmer Education: proposed New Text Book (and project); January 2010, George Washington University, Washington, DC, USA   <pdf>
  627. (r)  (Invited Book Foreword); in: Jih-Sheng Shen, Pao-Ann Hsiung (editors): Dynamic Reconfigurable Network-On-Chip Design: Innovations for Computational Processing and Communication; Idea Group Reference (ICI Global), April 2010, Hershey, PA, USA / London, UK  
  628. (k) ( workshop opening keynote): Future Challenges of Embedded Computing; Workshop on Next generation tools and platforms f. Embedded Media Applications (NEMA 2010); Feb 2010, Darmstadt, Germany <pdf>
  629. (k) ( conference opening keynote): Reconfigurable Computing: boosting Software Education for the Multicore Era; 6th Southern Programmable Logic Conference (SPL), March 24 - 26, 2010, Ipojuca, Porto de Galinhas beach (close to Recife), Pernambuco, Brasil  <keynotes>  <presentation> 
  630. (k) A Visionary Retrospective about Reconfigurable Computing Education;  6th Worksh on Reconfigurable Communication-centric Systems on Chip; ReCoSoC'10, May 2010, Karlsruhe, Germany <presentation>
  631. (k) Why we need to Reinvent Programmer Education; Seminar 10281: Dynamically Reconfigurable Architectures; Schloss Dagstuhl, July 11 - 16, 2010   <pdf>        
  632. (k) Why Reconfigurable Architectures are useful; Seminar 10281: Dynamically Reconfigurable Architectures; Schloss Dagstuhl, July 11 - 16, 2010  <pdf>  
  633. (g) The Grand Challenge To Reinvent Computing - A new World Model of Computing; CSBC_2010    XXX Congresso da Sociedade Brasileira de Computação , Belo Horizonte, July 20-23, 2010 <presentation>  <pdf>   <pdf-2> 
  634. (m) Term Rewriting (TR) using KARL; TU Kaiserslautern, 2010 <html>    
  635. (i)  interview by Carolina Vincentin:  Entrevista  REINER  HARTENSTEIN  -  O  paradigma  do  futuro; CORREIO BRASILIENSE, 9. August 2010
  636. (k) ( keynote address): Directions of Programming Research: Seeking a Needle in the Haystack? The 1st Brazilian-German Workshop on Micro and Nano Electronics (BGME’2010), October 6-8, 2010, Porto Allegre, RS, Brazil      <abstract>  <presentation>  <pdf2>                @
  637. (m) KARL: a Victim of the Missing Innovation Culture in Europe; TU Kaiserslautern, 2010 <pdf>    
  638. (p) (i)  interview: Unbezahlbarkeit der Betriebskosten für Computer droht; BNN 30Nov2010 <UBBK>  
  639. (m) Warum Computer neu erfunden werden müssen   <pdf>
  640. (m) "Mumifizenz" Draheim's Witz zur Bildungspolitik;   memo, 2010    <PDF> 
  641. (m)  Weiche Hardware zur Rettung der globalen Wirtschaft <pdf>   
  642. (m)  Verschärfung der Finanzkrise durch weiche Hardware, <pdf>      s.a FPGA-Autobahn: <pdf>
  643. (m)  Computing without Processors (Rechnen ohne Prozessoren)   <pdf>         
  644. (p) Unbezahlbarkeit der Betriebskosten für Computer droht.    
  645. (m) Computer-Stromverbrauch bald unbezahlbar?    <pdf> 
  646. (m) (Kurzfassung)  Drohender Zusammenbruch des Internet ?     <pdf>  
  647. (ts) The Expensive von Neumann Paradigm: is its Predominance still Tolerable? <pdf>   
  648. (m) Das von Neumann Syndrom als Thema in den Massenmedien    <pdf>       
  649. reprint in 2010: click here
  650. reprint in 2010: click here
  651. reprint in 2010: click here
  652. reprint in 2010: click here
  653. reprint in 2010: click here

  654. (r)  Invited Book Chapter 2. The Relevance of Reconfigurable Computing; in: (ed.) J.M.P. Cardoso, M, Hübner: Reconfigurable Computing: From FPGAs to Hardware/Software Codesign; Springer, 2011  
  655. (k) (workshop opening keynote): We Need to Reinvent Computing to Avoid its Future Unaffordable Electricity Consumption; FPGA forum, Febr. 2 - 3, 2011, Trondheim, Norway      <keynotes>   
  656. (w) CISCO white paper: IoT: How the Next Evolution of the Internet is Changing Everything; 2011  <pdf>
  657. (k) (conference plenum opening keynote): Aiming at Natural Equilibrium of Planet Earth Requires Reinvent Computing; IEEE Symp. on Circuits and Systems (ISCAS), May 15-18, 2011, Rio de Janeiro, Brazil, <photo>  <award>  <abstr> <ppt> <pres> <pdf>
  658. (k)(conference opening keynote): We have to Reinvent Computing moving FPGAs into Mainstream; FPGAworld, Sep 12, 2011, Copenhagen, Denmark   <abstract>   <keynotes>   <pdf>
  659. (r)  (Invited Book Chapter 18): The Paramountcy of Reconfigurable Computing; in: Albert Y. Zomaya, Young-Choon Lee (editors): Energy Efficient Distributed Computing Systems; Wiley & Sons, 2012, Hoboken, NJ, USA        
    < Chapter 18 error corrections >  < contents of corrected chapter 18 pdf < asking for corrected chapter pdf > 
       
  660. (m) Computer als Thema in den Medien;  <pdf>  (Akademie f. Politische Bildung, 2. - 3. Febr 2012, Tutzing)
  661. (m) Deutschlands notorische Probleme mit der Innovation;  <pdf>  (Ak. f. Pol. Bildg, Febr 2012, Tutzing)
  662. (k) Innovation als Thema in den Medien; Akad. f. Politische Bildung, 2-3 Dec  2012, Tutzing  <innov>
  663. (m) Speed-up Factors; memorandum  2012, TU Kaiserslautern  <pdf>
  664. (n,ns) Early EDA Innovations in Europe driven by Lynn Conway’s Lambda Notation;  2012, <pdf>  <freenet>                    
  665. (k) (keynote address): Stonewalled Progress of Computing Efficiency; SBCCI 2012 - 25th Symp. on Integrated Circuits and Systems Design; Aug 30 - Sep 2, 2012, Brasilia, Brazil  <pdf> <pdf> <keynotes>
  666. (k) (keynote address) The Tunnel Vision Syndrome: Challenging Computer Science Education; VIPISI 2012, 31 Dec 2012 - 1 Jan 2013, Бечичи (Bečići), Будва (Budva), Montenegro  <pdf>  <abstract>    The datastream-driven Anti Machine computing paradigm  
  667.      Using the wrong browser? This paragraph should have the number 667
  668. (k) ( featured invited talk at a keynote session): The Tunnel Vision Syndrome: Massively Delaying Progress; ASAP 2013 - The 24th IEEE Int'l Conf. on Application-specific Systems, Architectures and Processors; 5-7 June 2013, Washington, DC, USA  The datastream-driven Anti Machine computing paradigm        <presentation>  <paper>  <abstract>    <award-1>   <award-2>  
  669. (kj): (Invited Book Chapter): Karl Steinbuch; Neue Deutsche Biographie Band 25; (herausgegeben von der Historischen Kommission bei der Bayerischen Akademie der Wissenschaften), 2013, Verlag Duncker & Humblot, Berlin   <Biographie>  <Bestell-Flyer>  <Verlag>   <über Karl Steinbuch>   <Steinbuchs Nachlass>   <Bücher von Karl Steinbuch>   <Interview mit Karl Steinbuch> 
  670. (N) (Notiz) R. Hartenstein: Was wir im Fernsehen lernen können; Mai 2013 <http>  
  671.  (ti) (Invited Presentation) Klaus Müller-Glaser und das ITIV in den 70er Jahren; Festkolloquium z. 65. Geburtstag v. Prof. Klaus Müller-Glaser; 5. Juli 2013; KIT Karlsruhe Institute of Technology; Germany  <pdf>
  672. (m) Reiner Hartenstein: Speed-ups by Software to Configware Migrations; Mai 2013,  <http>  
  673. (m)   Das von Neumann Syndrom als Thema in den Massenmedien; August 2013 > <http>   
  674. (m)   Unserer Öffentlichkeit unbekannte massive Energieverschwendung; August 2013 <http>
  675.   Dramatischer Strategie-Wechsel der Mikroprozessor Industrie August 2013  <http>
  676.   Verschärfung der Finanzkrise durch weiche Hardware; August 2013, <http>
  677. (N) (Notiz)   Kasino-Kapitalismus mit FPL (mit weicher Hardware); August 2013,   <http> 
  678. (a) (abstract): Kopernikus and Software Engineering; August 2013, <http>  
  679. (m)   „Software“ ist keine „Weiche Hardware“ ! September 2013 <http>  
  680. (m)  #Kabelsalat: Droht unbezahlbarer Stromverbrauch des Internet ? (Die Gewaltigen Dimensionen des Internet); Sep 2013 http://fpl.org/T/                     
  681. (m) Der Unterschied zwischen Computer und Xputer: „Software“ gegenüber „Configware“ - eine Veranschaulichung; Sep 2013, f. Journalisten     
  682. (m) Unglaublich massiv Energie sparen durch „weiche Hardware“; September 2013  <pdf>
  683. (m) Computers are facing a seismic shift; November 2013  <http>
  684. (m) Computer stehen vor einem katastrophalen Umbruch; November 2013  <http>
  685. (m) Ein bekannter Wissenschafts-Journalist aus den USA prophezeiht den Kollaps; Nov 2013  <http>
  686. (m) The Shuffle Sort Algorithm; November 2013  <http>
  687. (m, 2nd version)   KARL: a Victim of Europe’s Missing Innovation Culture? Dec 1, 2013 <html>  
  688. (m)   The CHDL conference series: really killed by the VHDL lobby? 2013 (see 1999 at <html> )  
  689. Reiner Hartenstein: discouraging experiences with submitting to C_ACM:

    R. Hartenstein: Generalization of Software Engineering via Reconfigurable Computing; email-submitted to C_ACM (2011 or 2012), was rejected within 8 hours   <pdf>


  690. (m) Wissenschaftliche Revolutionen: Heiligen-Schändung? (in Vorbereitung)
  691. (m) R & D Progress as a Sacrilege (in preparation)
  692. (r) Xputer-related Literature: Part 2; Interner Bericht, Informatik, TU Kaiserslautern <html>  <html-part-1> 
  693. (m) Peter Marwedel's achievements; memo, 2014 <pdf>  <pdf-2> 
  694. (ti) (Invited Presentation): How many Dimensions has the Space beyond Reconfigurable Computing?; HiPEAC Computer Systems Week, May 12 -16, 2014, Barcelona, Spain   <pdf2>
  695. (ti) (Invited Presentation): Implementation of 3D Stacked Heterogeneity: Future Technology Aspects; Workshop on Self-Adaptive Heterogeneous Many-Core Technology Based on Flexible Tiles, September 1, 2014, co-located with the 24th International Conference on Field Programmable Logic and Applications (FPL-2014), September 1 – 5, 2014, Munich, Germany   <pdf1> <pdf2> <ppsx> <ppsx> <xml> <xml>  

  696. (m) Karl Steinbuch about how to invent something; Memorandum, January 2015   <pdf>      <Steinbuch>
  697. (m) Veranschaulichung des von-Neumann-Syndrom und des Reconfigurable Computing Paradox - auch für Laien verständlich; Memorandum, January 2015   <pdf>      <htm>     
  698. (m) The 'FIRSTs' by the Xputer Lab; highly uncomplete DRAFT memo, February 2016,   <pdf> <docx>     
  699. (m) Das Null Bock Paradox; memo, 2015    <pdf>      
  700. (m) Xputer-related Literature Links; 2015; <pdf>
  701. (m) EUROMICRO Conferences; memo, 2015    <pdf>  
  702. (m) Industrielle Revolutionen; Memorandum, 8. Mai 2015   <pdf>     
  703. (m) Bildungspolitik als Herausforderung; Memorandum, 8. Mai 2015   <pdf>     
  704. (m) Die IT-Herausforderung; Memorandum, 8. Mai 2015   <pdf>     
  705. (m) Bildungspolitik: Schlüssel einer erfolgreichen Wirtschaftspolitik; Memorandum, 10. Mai 2015   <pdf>     
  706. (g) Die IT-Herausforderung; Seite 22, Wirtschaftsforum 9, 2015   <pdf>                                                   <Pressespiegel>
  707. (g) Die IT-Herausforderung; längere Fassung, eingereicht beim Wirtschaftsforum   <pdf>     
  708. (ki) ( Invited Presentation): How to Cope with the Power Wall; PATMOS 2015, Sep 1 - 5, Salvador, Bahia, Brasil   <pdf> <ppsx> <ppt> small: <pdf> <ppsx> <ppt> preface: <pdf> <ppsx> <ppt> PATM site: <pdf> <ppsx> <ppt> small: <pdf> <ppsx> <ppt> preface: <pdf> <ppsx> <ppt>       

  709.      Using the wrong browser? This paragraph should have the number 708 

  710. (g) Wirtschaft 4.0 für unser Straßennetz; eingereicht für das Wirtschaftsforum 2016   <pdf>     
  711. (m) Wir Schaffen Das ? Kommen die 4,4 Milliarden Afrikaner dann alle nach Deutschland ? Memo zum Zuwanderungsproblem, Baden-Baden, Januar 2016   <html>     
  712. (s) The alternative Machine Paradigm for Energy-Efficient Computing; submitted;   <->;     
 

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